Searched refs:PHYCLK_USBDRD300_UDRD30_PHYCLK_USER (Results 1 – 3 of 3) sorted by relevance
137 #define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER 7 macro
955 GATE(PHYCLK_USBDRD300_UDRD30_PHYCLK_USER,
683 <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER>,