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/linux-6.1.9/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,pdc.yaml7 title: PDC interrupt controller
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
20 controller PDC is next in hierarchy, followed by others. Drivers requiring
21 wakeup capabilities of their device interrupts routed through the PDC, must
22 specify PDC as their interrupt controller and request the PDC port associated
41 - description: PDC base register region
55 - description: starting PDC port
56 - description: GIC hwirq number for the PDC port
59 Specifies the PDC pin offset and the number of PDC ports.
60 The tuples indicates the valid mapping of valid PDC ports
Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
52 * TZ1090 PDC block
82 * An SoC peripheral that is wired through the PDC.
/linux-6.1.9/Documentation/devicetree/bindings/mailbox/
Dbrcm,iproc-pdc-mbox.txt1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
/linux-6.1.9/Documentation/devicetree/bindings/display/msm/
Dgmu.yaml99 - description: GMU PDC registers
100 - description: GMU PDC sequence registers
131 - description: GMU PDC registers
167 - description: GMU PDC registers
168 - description: GMU PDC sequence registers
187 - description: GMU PDC registers
188 - description: GMU PDC sequence registers
/linux-6.1.9/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml7 title: Qualcomm PDC Global
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
/linux-6.1.9/Documentation/devicetree/bindings/serial/
Datmel,at91-usart.yaml69 description: use of PDC or DMA for receiving data
73 description: use of PDC or DMA for transmitting data
130 /* use PDC */
/linux-6.1.9/drivers/parisc/
DKconfig114 bool "PDC chassis state codes support"
132 bool "PDC chassis warnings support"
146 tristate "PDC Stable Storage support"
151 variables (PDC non volatile variables such as Primary Boot Path,
/linux-6.1.9/Documentation/devicetree/bindings/watchdog/
Dimgpdc-wdt.txt1 *ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
/linux-6.1.9/Documentation/devicetree/bindings/misc/
Datmel-ssc.txt31 - PDC transfer:
/linux-6.1.9/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi217 reg = <0x612c0000 0x445>; /* PDC FS0 regs */
233 reg = <0x612e0000 0x445>; /* PDC FS1 regs */
249 reg = <0x61300000 0x445>; /* PDC FS2 regs */
265 reg = <0x61320000 0x445>; /* PDC FS3 regs */
/linux-6.1.9/sound/soc/atmel/
DKconfig25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"
31 in PDC mode configured using audio-graph-card in device-tree.
/linux-6.1.9/drivers/reset/
DKconfig172 tristate "Qualcomm PDC Reset Driver"
175 This enables the PDC (Power Domain Controller) reset driver
177 to control reset signals provided by PDC for Modem, Compute,
/linux-6.1.9/Documentation/devicetree/bindings/remoteproc/
Dqcom,sdm845-adsp-pil.yaml68 - description: PDC AUDIO SYNC RESET
Dqcom,sc7280-wpss-pil.yaml71 - description: PDC SYNC
Dqcom,sc7180-mss-pil.yaml87 - description: PDC reset
Dqcom,sc7280-mss-pil.yaml87 - description: PDC reset
Dqcom,adsp.yaml550 - description: PDC reset
/linux-6.1.9/drivers/video/fbdev/sis/
Dvstruct.h295 short PDC, PDCA; member
Dsis_main.c3005 if(ivideo->SiS_Pr.PDC == -1) { in sisfb_save_pdc_emi()
3007 ivideo->SiS_Pr.PDC = ivideo->detectedpdc; in sisfb_save_pdc_emi()
3012 if((ivideo->SiS_Pr.PDC != -1) && in sisfb_save_pdc_emi()
3013 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) { in sisfb_save_pdc_emi()
3015 ivideo->SiS_Pr.PDC); in sisfb_save_pdc_emi()
3056 if(ivideo->SiS_Pr.PDC == -1) { in sisfb_save_pdc_emi()
3058 ivideo->SiS_Pr.PDC = ivideo->detectedpdc; in sisfb_save_pdc_emi()
3093 if((ivideo->SiS_Pr.PDC != -1) && in sisfb_save_pdc_emi()
3094 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) { in sisfb_save_pdc_emi()
3096 ivideo->SiS_Pr.PDC); in sisfb_save_pdc_emi()
[all …]
Dinit301.c6511 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; in SiS_SetGroup1()
6525 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC; in SiS_SetGroup1()
9992 if(SiS_Pr->PDC != -1) { in SetDelayComp()
9993 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2d,0xf0,((SiS_Pr->PDC >> 1) & 0x0f)); in SetDelayComp()
9994 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x35,0x7f,((SiS_Pr->PDC & 0x01) << 7)); in SetDelayComp()
10594 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->PDC != -1)) { in SetDelayComp661()
10595 delay = SiS_Pr->PDC & 0x1f; in SetDelayComp661()
11081 if(SiS_Pr->PDC != -1) return; in SetOEMLCDDelay()
/linux-6.1.9/drivers/ata/
Dsata_qstor.c149 { PCI_VDEVICE(PDC, 0x2068), board_2068_idx },
Dpdc_adma.c160 { PCI_VDEVICE(PDC, 0x1841), board_1841_idx },
/linux-6.1.9/Documentation/userspace-api/media/v4l/
Dbiblio.rst34 :title: ETS 300 231 "Specification of the domestic video Programme Delivery Control system (PDC
/linux-6.1.9/arch/parisc/kernel/
Dperf_asm.S87 ;* for RDR10 which has bits that preclude PDC stack operations
/linux-6.1.9/drivers/mailbox/
DKconfig220 SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.

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