| /linux-6.1.9/drivers/clk/samsung/ |
| D | clk-s3c2410.c | 85 GATE(PCLK_UART1, "uart1", "pclk", CLKCON, 11, 0, 0),
178 ALIAS(PCLK_UART1, "s3c2410-uart.1", "uart"),
181 ALIAS(PCLK_UART1, "s3c2410-uart.1", "clk_uart_baud0"),
266 ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"),
269 ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"),
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| D | clk-s3c2412.c | 114 GATE(PCLK_UART1, "uart1", "pclk", CLKCON, 20, 0, 0),
138 ALIAS(PCLK_UART1, "s3c2412-uart.1", "uart"),
141 ALIAS(PCLK_UART1, "s3c2412-uart.1", "clk_uart_baud2"),
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| D | clk-s3c2443.c | 141 GATE(PCLK_UART1, "uart1", "pclk", PCLKCON, 1, 0, 0),
153 ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"),
157 ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"),
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| D | clk-s3c64xx.c | 243 GATE_BUS(PCLK_UART1, "pclk_uart1", "pclk", PCLK_GATE, 2),
348 ALIAS(PCLK_UART1, "s3c6400-uart.1", "uart"),
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| /linux-6.1.9/arch/arm/boot/dts/ |
| D | s3c2416.dtsi | 108 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
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| D | s3c64xx.dtsi | 135 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
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| /linux-6.1.9/include/dt-bindings/clock/ |
| D | s3c2410.h | 32 #define PCLK_UART1 17 macro
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| D | s3c2412.h | 49 #define PCLK_UART1 40 macro
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| D | s3c2443.h | 69 #define PCLK_UART1 73 macro
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| D | samsung,s3c64xx-clock.h | 87 #define PCLK_UART1 72 macro
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| D | rk3036-cru.h | 69 #define PCLK_UART1 342 macro
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| D | exynos7-clk.h | 93 #define PCLK_UART1 1 macro
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| D | rk3188-cru-common.h | 85 #define PCLK_UART1 333 macro
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| D | rk3128-cru.h | 109 #define PCLK_UART1 342 macro
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| D | rk3228-cru.h | 108 #define PCLK_UART1 342 macro
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| D | rv1108-cru.h | 117 #define PCLK_UART1 266 macro
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| D | rk3288-cru.h | 134 #define PCLK_UART1 342 macro
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| D | rk3308-cru.h | 177 #define PCLK_UART1 198 macro
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| D | rk3328-cru.h | 142 #define PCLK_UART1 211 macro
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| D | rk3368-cru.h | 126 #define PCLK_UART1 342 macro
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| D | px30-cru.h | 152 #define PCLK_UART1 329 macro
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| D | rockchip,rv1126-cru.h | 45 #define PCLK_UART1 32 macro
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| D | rk3399-cru.h | 248 #define PCLK_UART1 353 macro
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| /linux-6.1.9/Documentation/devicetree/bindings/clock/ |
| D | rockchip,rk3568-cru.yaml | 16 (examples: provide SCLK_UART1\PCLK_UART1 and SRST_P_UART1\SRST_S_UART1 for UART module)
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| /linux-6.1.9/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 653 GATE(PCLK_UART1, "pclk_uart1", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 1, GFLAGS),
744 GATE(PCLK_UART1, "pclk_uart1", "hclk_ahb2apb", 0, RK2928_CLKGATE_CON(8), 1, GFLAGS),
|