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Searched refs:PCLK_SPI2 (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dexynos7-clk.h106 #define PCLK_SPI2 14 macro
Drk3288-cru.h132 #define PCLK_SPI2 340 macro
Drk3308-cru.h188 #define PCLK_SPI2 209 macro
Drk3368-cru.h124 #define PCLK_SPI2 340 macro
Drk3399-cru.h244 #define PCLK_SPI2 349 macro
Drk3568-cru.h404 #define PCLK_SPI2 341 macro
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3368.c800 GATE(PCLK_SPI2, "pclk_spi2", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 6, GFLAGS),
Dclk-rk3288.c737 GATE(PCLK_SPI2, "pclk_spi2", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 6, GFLAGS),
Dclk-rk3308.c877 GATE(PCLK_SPI2, "pclk_spi2", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 6, GFLAGS),
Dclk-rk3399.c1048 GATE(PCLK_SPI2, "pclk_spi2", "pclk_perilp1", 0, RK3399_CLKGATE_CON(23), 12, GFLAGS),
Dclk-rk3568.c1355 GATE(PCLK_SPI2, "pclk_spi2", "pclk_bus", 0,
/linux-6.1.9/drivers/clk/samsung/
Dclk-exynos7.c765 GATE(PCLK_SPI2, "pclk_spi2", "mout_aclk_peric1_66_user",
/linux-6.1.9/arch/arm64/boot/dts/rockchip/
Drk3368.dtsi262 clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
Drk3308.dtsi391 clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
Drk356x.dtsi1274 clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;
Drk3399.dtsi760 clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
/linux-6.1.9/arch/arm/boot/dts/
Drk3288.dtsi308 clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;