/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
D | cz_ih.c | 197 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr() 203 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr() 206 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in cz_ih_get_wptr()
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D | iceland_ih.c | 197 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr() 203 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr() 206 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in iceland_ih_get_wptr()
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D | tonga_ih.c | 199 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr() 205 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr() 208 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in tonga_ih_get_wptr()
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D | si_ih.c | 57 WREG32(IH_RB_WPTR, 0); in si_ih_disable_interrupts() 88 WREG32(IH_RB_WPTR, 0); in si_ih_irq_init()
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D | vega10_ih.c | 349 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr() 357 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr() 360 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega10_ih_get_wptr()
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D | vega20_ih.c | 400 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega20_ih_get_wptr() 408 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega20_ih_get_wptr() 411 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega20_ih_get_wptr()
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D | ih_v6_0.c | 399 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_0_get_wptr() 403 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_0_get_wptr() 405 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in ih_v6_0_get_wptr()
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D | navi10_ih.c | 420 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr() 428 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr() 430 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in navi10_ih_get_wptr()
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D | sid.h | 664 #define IH_RB_WPTR 0xF83 macro
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/linux-6.1.9/drivers/gpu/drm/radeon/ |
D | r600.c | 3613 WREG32(IH_RB_WPTR, 0); in r600_disable_interrupts() 3725 WREG32(IH_RB_WPTR, 0); in r600_irq_init() 4044 wptr = RREG32(IH_RB_WPTR); in r600_get_ih_wptr() 4107 RREG32(IH_RB_WPTR); in r600_irq_process()
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D | sid.h | 661 #define IH_RB_WPTR 0x3e0c macro
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D | cikd.h | 811 #define IH_RB_WPTR 0x3e0c macro
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D | evergreend.h | 1230 #define IH_RB_WPTR 0x3e0c macro
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D | si.c | 5938 WREG32(IH_RB_WPTR, 0); in si_disable_interrupts() 6024 WREG32(IH_RB_WPTR, 0); in si_irq_init() 6212 wptr = RREG32(IH_RB_WPTR); in si_get_ih_wptr()
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D | r600d.h | 669 #define IH_RB_WPTR 0x3e0c macro
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D | cik.c | 6842 WREG32(IH_RB_WPTR, 0); in cik_disable_interrupts() 6986 WREG32(IH_RB_WPTR, 0); in cik_irq_init() 7488 wptr = RREG32(IH_RB_WPTR); in cik_get_ih_wptr()
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D | evergreen.c | 4685 wptr = RREG32(IH_RB_WPTR); in evergreen_get_ih_wptr()
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