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Searched refs:GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h4310 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK 0x00000006L macro
Dgfx_7_2_sh_mask.h14613 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK 0x6 macro
Dgfx_8_0_sh_mask.h16541 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK 0x6 macro
Dgfx_8_1_sh_mask.h17129 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK 0x6 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h4726 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK … macro
Dgc_9_1_sh_mask.h4198 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK … macro
Dgc_9_2_1_sh_mask.h4104 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK … macro
Dgc_9_4_2_sh_mask.h6835 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK … macro
Dgc_10_1_0_sh_mask.h8997 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK … macro
Dgc_10_3_0_sh_mask.h9174 #define GDS_CONFIG__SH0_GPR_PHASE_SEL_MASK … macro