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Searched refs:CLK_TOP_I2C_SEL (Results 1 – 13 of 13) sorted by relevance

/linux-6.1.9/include/dt-bindings/clock/
Dmt7986-clk.h55 #define CLK_TOP_I2C_SEL 32 macro
Dmt8516-clk.h180 #define CLK_TOP_I2C_SEL 148 macro
Dmt6765-clk.h155 #define CLK_TOP_I2C_SEL 120 macro
Dmediatek,mt8365-clk.h98 #define CLK_TOP_I2C_SEL 88 macro
Dmt2712-clk.h193 #define CLK_TOP_I2C_SEL 162 macro
Dmt8192-clk.h48 #define CLK_TOP_I2C_SEL 36 macro
/linux-6.1.9/drivers/clk/mediatek/
Dclk-mt7986-topckgen.c190 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x010,
Dclk-mt8516.c402 MUX(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents,
Dclk-mt8167.c592 MUX(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents,
Dclk-mt2712.c881 MUX_GATE(CLK_TOP_I2C_SEL, "i2c_sel",
Dclk-mt6765.c446 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, CLK_CFG_6,
Dclk-mt8365.c496 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x0b0,
Dclk-mt8192.c638 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel",