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Searched refs:CLK_NR_CLKS (Results 1 – 25 of 47) sorted by relevance

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/linux-6.1.9/include/dt-bindings/clock/
Dexynos5410.h64 #define CLK_NR_CLKS 512 macro
Dactions,s500-cmu.h83 #define CLK_NR_CLKS (CLK_ETHERNET + 1) macro
Dactions,s700-cmu.h116 #define CLK_NR_CLKS (CLK_PCM1 + 1) macro
Dactions,s900-cmu.h127 #define CLK_NR_CLKS (CLK_RMII_REF + 1) macro
Dpistachio-clk.h105 #define CLK_NR_CLKS 113 macro
Drk3036-cru.h97 #define CLK_NR_CLKS (HCLK_PERI + 1) macro
Dexynos5250.h181 #define CLK_NR_CLKS 1031 macro
Drk3188-cru-common.h135 #define CLK_NR_CLKS (HCLK_HDMI + 1) macro
Drk3128-cru.h147 #define CLK_NR_CLKS (HCLK_PERI + 1) macro
Dexynos5420.h275 #define CLK_NR_CLKS 800 macro
Drk3228-cru.h149 #define CLK_NR_CLKS (HCLK_PERI + 1) macro
Dexynos4.h243 #define CLK_NR_CLKS 462 macro
Dexynos3250.h263 #define CLK_NR_CLKS 250 macro
Drv1108-cru.h166 #define CLK_NR_CLKS (HCLK_VPU + 1) macro
Drk3288-cru.h198 #define CLK_NR_CLKS (HCLK_PERI + 1) macro
Drk3308-cru.h215 #define CLK_NR_CLKS (PCLK_OWIRE + 1) macro
Drk3328-cru.h204 #define CLK_NR_CLKS (HCLK_HDCP + 1) macro
Drk3368-cru.h185 #define CLK_NR_CLKS (HCLK_PERI + 1) macro
Dpx30-cru.h178 #define CLK_NR_CLKS (PCLK_OTP_PHY + 1) macro
Drockchip,rv1126-cru.h356 #define CLK_NR_CLKS (PCLK_OTP + 1) macro
/linux-6.1.9/drivers/clk/x86/
Dclk-lgm.c115 #define CLK_NR_CLKS (LGM_GCLK_USB2 + 1) macro
429 ctx = devm_kzalloc(dev, struct_size(ctx, clk_data.hws, CLK_NR_CLKS), in lgm_cgu_probe()
434 ctx->clk_data.num = CLK_NR_CLKS; in lgm_cgu_probe()
/linux-6.1.9/drivers/clk/meson/
Dmeson8b.h188 #define CLK_NR_CLKS 218 macro
Dmeson8b.c2978 [CLK_NR_CLKS] = NULL,
2980 .num = CLK_NR_CLKS,
3197 [CLK_NR_CLKS] = NULL,
3199 .num = CLK_NR_CLKS,
3418 [CLK_NR_CLKS] = NULL,
3420 .num = CLK_NR_CLKS,
3833 for (i = CLKID_PLL_FIXED; i < CLK_NR_CLKS; i++) { in meson8b_clkc_init_common()
/linux-6.1.9/drivers/clk/samsung/
Dclk-exynos5410.c263 .nr_clk_ids = CLK_NR_CLKS,
/linux-6.1.9/drivers/clk/pistachio/
Dclk-pistachio.c175 p = pistachio_clk_alloc_provider(np, CLK_NR_CLKS); in pistachio_clk_init()

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