Searched refs:CLK_B (Results 1 – 3 of 3) sorted by relevance
25 #define CLK_B (1 << 18) macro
218 phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;272 rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_B>;273 rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_B>;274 rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_B>;500 sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>;788 DATA6 = <&pio13 5 ALT2 IN SE_NICLK_IO 0 CLK_B>;789 DATA5 = <&pio13 6 ALT2 IN SE_NICLK_IO 0 CLK_B>;790 DATA4 = <&pio13 7 ALT2 IN SE_NICLK_IO 0 CLK_B>;792 DATA2 = <&pio14 1 ALT2 IN SE_NICLK_IO 0 CLK_B>;829 VALID = <&pio14 3 ALT3 IN SE_NICLK_IO 0 CLK_B>;[all …]
146 CLK_B151 as non inverted clock retimed with CLK_B and delay of 0 pico seconds:158 mmcclk = <&PIO13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>;