Searched refs:CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT (Results 1 – 9 of 9) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | fiji_baco.c | 70 …C_IND_DATA, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT…
74 …C_IND_DATA, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT…
|
| D | ci_baco.c | 72 …C_IND_DATA, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT…
76 …C_IND_DATA, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT…
|
| D | tonga_baco.c | 70 …C_IND_DATA, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT…
74 …C_IND_DATA, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK, CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT…
|
| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/smu/ |
| D | smu_7_0_0_sh_mask.h | 134 #define CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT 0x17 macro
|
| D | smu_7_1_1_sh_mask.h | 130 #define CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT 0x17 macro
|
| D | smu_7_0_1_sh_mask.h | 130 #define CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT 0x17 macro
|
| D | smu_7_1_0_sh_mask.h | 130 #define CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT 0x17 macro
|
| D | smu_7_1_2_sh_mask.h | 130 #define CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT 0x17 macro
|
| D | smu_7_1_3_sh_mask.h | 154 #define CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT 0x17 macro
|