Searched refs:Base (Results 1 – 25 of 186) sorted by relevance
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| /linux-6.1.9/Documentation/devicetree/bindings/clock/ |
| D | lpc1850-cgu.txt | 42 specific LPC part. Base clocks are numbered from 0 to 27.
45 0 BASE_SAFE_CLK Base safe clock (always on) for WWDT
46 1 BASE_USB0_CLK Base clock for USB0
47 2 BASE_PERIPH_CLK Base clock for Cortex-M0SUB subsystem,
49 3 BASE_USB1_CLK Base clock for USB1
52 5 BASE_SPIFI_CLK Base clock for SPIFI
53 6 BASE_SPI_CLK Base clock for SPI
54 7 BASE_PHY_RX_CLK Base clock for Ethernet PHY Receive clock
55 8 BASE_PHY_TX_CLK Base clock for Ethernet PHY Transmit clock
56 9 BASE_APB1_CLK Base clock for APB peripheral block # 1
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| D | armada3700-tbg-clock.txt | 1 * Time Base Generator Clock bindings for Marvell Armada 37xx SoCs
3 Marvell Armada 37xx SoCs provide Time Base Generator clocks which are
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| /linux-6.1.9/Documentation/hwmon/ |
| D | smsc47b397.rst | 40 pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The
41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
42 and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and
170 Obtaining the HWM Base Address
173 The following is an example of how to read the HWM Base Address located in
191 OUT DX,AL ; Point to HWM Base Addr MSB
193 IN AL,DX ; Get MSB of HWM Base Addr
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| /linux-6.1.9/arch/arm/boot/dts/ |
| D | spear300.dtsi | 35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x0010>; /* NAND Base CMD */
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| D | owl-s500-labrador-base-m.dts | 3 * Caninos Labrador Base Board
13 model = "Caninos Labrador Core v2 on Labrador Base-M v1";
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| D | kirkwood-openrd-base.dts | 3 * Marvell OpenRD Base Board Description
16 model = "OpenRD Base";
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| D | spear310.dtsi | 30 0x40000000 0x0010 /* NAND Base DATA */
31 0x40020000 0x0010 /* NAND Base ADDR */
32 0x40010000 0x0010>; /* NAND Base CMD */
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| D | spear320.dtsi | 37 0x50000000 0x0010 /* NAND Base DATA */
38 0x50020000 0x0010 /* NAND Base ADDR */
39 0x50010000 0x0010>; /* NAND Base CMD */
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| D | armada-388-clearfog-base.dts | 3 * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
12 model = "SolidRun Clearfog Base A1";
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| D | spear600.dtsi | 77 0xd2000000 0x0010 /* NAND Base DATA */
78 0xd2020000 0x0010 /* NAND Base ADDR */
79 0xd2010000 0x0010>; /* NAND Base CMD */
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| D | owl-s500-guitar-bb-rev-b.dts | 12 model = "LeMaker Guitar Base Board rev. B";
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| /linux-6.1.9/Documentation/devicetree/bindings/arm/ |
| D | actions.yaml | 27 - caninos,labrador-base-m # Labrador Base Board M v1
32 - lemaker,guitar-bb-rev-b # LeMaker Guitar Base Board rev. B
39 - caninos,labrador-base-m2 # Labrador Base Board M v2
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| /linux-6.1.9/Documentation/PCI/endpoint/ |
| D | pci-vntb-function.rst | 66 +--------------------------------------------------+ Base
74 +-----------------------+--------------------------+ Base + span_offset
79 +-----------------------+--------------------------+ Base + span_offset
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| /linux-6.1.9/Documentation/networking/ |
| D | arcnet-hardware.rst | 596 | Offs|Base |I/O Addr |
621 S1 1-3: I/O Base Address Select
622 4-6: Memory Base Address Select
645 Setting the I/O Base Address
649 of eight possible I/O Base addresses using the following table::
665 Setting the Base Memory (RAM) buffer Address
670 Switches 4-6 of switch group S1 select the Base of the 16K block.
829 SW1 1-6: I/O Base Address Select
886 Setting the I/O Base Address
890 of 32 possible I/O Base addresses using the following table::
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| /linux-6.1.9/Documentation/devicetree/bindings/mtd/ |
| D | fsmc-nand.txt | 47 0xd2000000 0x0010 /* NAND Base DATA */
48 0xd2020000 0x0010 /* NAND Base ADDR */
49 0xd2010000 0x0010>; /* NAND Base CMD */
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| /linux-6.1.9/Documentation/devicetree/bindings/watchdog/ |
| D | arm,sbsa-gwdt.yaml | 7 title: SBSA (Server Base System Architecture) Generic Watchdog
15 timer can be found in the ARM document: ARM-DEN-0029 - Server Base System
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| /linux-6.1.9/arch/arm/boot/compressed/ |
| D | head-sharpsl.S | 29 mov r1, #0x10000000 @ Base address of TC6393 chip
43 ldr r1, .W100ADDR @ Base address of w100 chip + regs offset
129 mov r1, #0x0c000000 @ Base address of NAND chip
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| /linux-6.1.9/Documentation/devicetree/bindings/iommu/ |
| D | qcom,iommu.txt | 29 - ranges : Base address and size of the iommu context banks.
39 - reg : Base address and size of context bank within the iommu
44 - reg : Base address and size of the SMMU local base, should
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| /linux-6.1.9/Documentation/scsi/ |
| D | hptiop.rst | 89 0x4000 Inbound List Base Address Low
90 0x4004 Inbound List Base Address High
93 0x4050 Outbound List Base Address Low
94 0x4054 Outbound List Base Address High
95 0x4058 Outbound List Copy Pointer Shadow Base Address Low
96 0x405C Outbound List Copy Pointer Shadow Base Address High
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| /linux-6.1.9/arch/arm/ |
| D | Kconfig-nommu | 14 hex '(S)DRAM Base Address' if SET_MEM_PARAM
22 hex 'FLASH Base Address' if SET_MEM_PARAM
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| /linux-6.1.9/tools/testing/selftests/rcutorture/bin/ |
| D | config_override.sh | 19 echo Base file $base unreadable!!!
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| /linux-6.1.9/arch/arm64/boot/dts/renesas/ |
| D | r8a779g0-white-hawk-ethernet.dtsi | 3 * Device Tree Source for the R-Car V4H White Hawk RAVB/Ethernet(1000Base-T1)
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| /linux-6.1.9/Documentation/networking/device_drivers/ethernet/wangxun/ |
| D | txgbe.rst | 4 Linux Base Driver for WangXun(R) 10 Gigabit PCI Express Adapters
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| /linux-6.1.9/arch/powerpc/boot/dts/fsl/ |
| D | e500v1_power_isa.dtsi | 38 power-isa-b; // Base
40 power-isa-atb; // Alternate Time Base
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| D | e500v2_power_isa.dtsi | 38 power-isa-b; // Base
40 power-isa-atb; // Alternate Time Base
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