Searched refs:BIT24 (Results 1 – 19 of 19) sorted by relevance
198 #define IMR_TSF_BIT32_TOGGLE_8723B BIT24 /* TSF Timer BIT32 toggle indication interrupt */220 #define IMR_BCNDMAINT4_8723B BIT24 /* Beacon DMA Interrupt 4 */
41 #define BIT24 0x01000000 macro
691 #define IMR_BCNDOK7 BIT24 /* Beacon Queue DMA OK Interrupt 7 */738 #define RCR_ENMBID BIT24 /* Enable Multiple BssId. Only response ACK to the packets whose DID(A…1294 #define SDIO_HIMR_OCPINT_MSK BIT241316 #define SDIO_HISR_OCPINT BIT24
65 #define DYNAMIC_RF_TX_PWR_TRACK BIT24/* ODM_RF_TX_PWR_TRACK */
55 #define BIT24 0x01000000 macro
847 u32tmp &= ~BIT24; in halbtc8723b1ant_set_ant_path()899 u32tmp |= BIT24; in halbtc8723b1ant_set_ant_path()964 u32tmp &= ~BIT24; in halbtc8723b1ant_set_ant_path()
930 u4_tmp |= BIT24; in btc8821a1ant_set_ant_path()959 u4_tmp &= ~BIT24; in btc8821a1ant_set_ant_path()
1160 u32tmp |= BIT24; in btc8723b2ant_set_ant_path()1188 u32tmp &= ~BIT24; in btc8723b2ant_set_ant_path()
1086 u4tmp |= BIT24; in btc8821a2ant_set_ant_path()
387 #define IMR_TSF_BIT32_TOGGLE_8723B BIT24 /* TSF Timer BIT32 toggle indication interrupt */409 #define IMR_BCNDMAINT4_8723B BIT24 /* Beacon DMA Interrupt 4 */
858 u4Tmp &= ~BIT24; in halbtc8723b1ant_SetAntPath()893 u4Tmp |= BIT24; in halbtc8723b1ant_SetAntPath()940 u4Tmp &= ~BIT24; in halbtc8723b1ant_SetAntPath()
386 ODM_RF_TX_PWR_TRACK = BIT24,
83 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32); in setIqkMatrix_8723B()107 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00); in setIqkMatrix_8723B()
882 u4Tmp |= BIT24; in halbtc8723b2ant_SetAntPath()900 u4Tmp &= ~BIT24; in halbtc8723b2ant_SetAntPath()
34 #define BIT24 0x01000000 macro
43 #define BIT24 0x01000000 macro
52 #define BIT24 0x01000000 macro
136 #define RCR_ACKTXBW (BIT24|BIT25)
793 #define LPFC_SLI4_INTR24 BIT24