Searched refs:AVIVO_D1MODE_MASTER_UPDATE_MODE (Results 1 – 3 of 3) sorted by relevance
362 #define AVIVO_D1MODE_MASTER_UPDATE_MODE 0x60e4 macro
380 tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i]); in rv515_mc_resume()384 WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i], tmp); in rv515_mc_resume()
1647 WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 3); in avivo_crtc_do_set_base()