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Searched refs:ACPILevel (Results 1 – 16 of 16) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dfiji_smumgr.c1310 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in fiji_populate_smc_acpi_level()
1315 table->ACPILevel.SclkFrequency = in fiji_populate_smc_acpi_level()
1319 table->ACPILevel.SclkFrequency, in fiji_populate_smc_acpi_level()
1320 (uint32_t *)(&table->ACPILevel.MinVoltage), &mvdd); in fiji_populate_smc_acpi_level()
1326 table->ACPILevel.SclkFrequency = in fiji_populate_smc_acpi_level()
1328 table->ACPILevel.MinVoltage = in fiji_populate_smc_acpi_level()
1334 table->ACPILevel.SclkFrequency, &dividers); in fiji_populate_smc_acpi_level()
1339 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_acpi_level()
1340 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in fiji_populate_smc_acpi_level()
1341 table->ACPILevel.DeepSleepDivId = 0; in fiji_populate_smc_acpi_level()
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Diceland_smumgr.c1438 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in iceland_populate_smc_acpi_level()
1441 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE); in iceland_populate_smc_acpi_level()
1443 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE); in iceland_populate_smc_acpi_level()
1445 table->ACPILevel.MinVddcPhases = vddc_phase_shed_control ? 0 : 1; in iceland_populate_smc_acpi_level()
1447 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in iceland_populate_smc_acpi_level()
1451 table->ACPILevel.SclkFrequency, &dividers); in iceland_populate_smc_acpi_level()
1457 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in iceland_populate_smc_acpi_level()
1458 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in iceland_populate_smc_acpi_level()
1459 table->ACPILevel.DeepSleepDivId = 0; in iceland_populate_smc_acpi_level()
1468 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in iceland_populate_smc_acpi_level()
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Dci_smumgr.c1393 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in ci_populate_smc_acpi_level()
1396 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
1398 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
1400 table->ACPILevel.MinVddcPhases = data->vddc_phase_shed_control ? 0 : 1; in ci_populate_smc_acpi_level()
1402 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in ci_populate_smc_acpi_level()
1406 table->ACPILevel.SclkFrequency, &dividers); in ci_populate_smc_acpi_level()
1412 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_acpi_level()
1413 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_smc_acpi_level()
1414 table->ACPILevel.DeepSleepDivId = 0; in ci_populate_smc_acpi_level()
1423 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in ci_populate_smc_acpi_level()
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Dvegam_smumgr.c1122 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in vegam_populate_smc_acpi_level()
1130 &table->ACPILevel.MinVoltage, &mvdd); in vegam_populate_smc_acpi_level()
1137 &(table->ACPILevel.SclkSetting)); in vegam_populate_smc_acpi_level()
1142 table->ACPILevel.DeepSleepDivId = 0; in vegam_populate_smc_acpi_level()
1143 table->ACPILevel.CcPwrDynRm = 0; in vegam_populate_smc_acpi_level()
1144 table->ACPILevel.CcPwrDynRm1 = 0; in vegam_populate_smc_acpi_level()
1146 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags); in vegam_populate_smc_acpi_level()
1147 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage); in vegam_populate_smc_acpi_level()
1148 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm); in vegam_populate_smc_acpi_level()
1149 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1); in vegam_populate_smc_acpi_level()
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Dtonga_smumgr.c1189 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in tonga_populate_smc_acpi_level()
1191 table->ACPILevel.MinVoltage = in tonga_populate_smc_acpi_level()
1195 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in tonga_populate_smc_acpi_level()
1199 table->ACPILevel.SclkFrequency, &dividers); in tonga_populate_smc_acpi_level()
1206 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_acpi_level()
1207 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in tonga_populate_smc_acpi_level()
1208 table->ACPILevel.DeepSleepDivId = 0; in tonga_populate_smc_acpi_level()
1217 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in tonga_populate_smc_acpi_level()
1218 table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2; in tonga_populate_smc_acpi_level()
1219 table->ACPILevel.CgSpllFuncCntl3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in tonga_populate_smc_acpi_level()
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Dpolaris10_smumgr.c1288 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in polaris10_populate_smc_acpi_level()
1296 &table->ACPILevel.MinVoltage, &mvdd); in polaris10_populate_smc_acpi_level()
1302 result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting)); in polaris10_populate_smc_acpi_level()
1305 table->ACPILevel.DeepSleepDivId = 0; in polaris10_populate_smc_acpi_level()
1306 table->ACPILevel.CcPwrDynRm = 0; in polaris10_populate_smc_acpi_level()
1307 table->ACPILevel.CcPwrDynRm1 = 0; in polaris10_populate_smc_acpi_level()
1309 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags); in polaris10_populate_smc_acpi_level()
1310 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage); in polaris10_populate_smc_acpi_level()
1311 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm); in polaris10_populate_smc_acpi_level()
1312 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1); in polaris10_populate_smc_acpi_level()
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/linux-6.1.9/drivers/gpu/drm/radeon/
Dci_dpm.c2962 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in ci_populate_smc_acpi_level()
2965 table->ACPILevel.MinVddc = cpu_to_be32(pi->acpi_vddc * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
2967 table->ACPILevel.MinVddc = cpu_to_be32(pi->min_vddc_in_pp_table * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
2969 table->ACPILevel.MinVddcPhases = pi->vddc_phase_shed_control ? 0 : 1; in ci_populate_smc_acpi_level()
2971 table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq; in ci_populate_smc_acpi_level()
2975 table->ACPILevel.SclkFrequency, false, &dividers); in ci_populate_smc_acpi_level()
2979 table->ACPILevel.SclkDid = (u8)dividers.post_divider; in ci_populate_smc_acpi_level()
2980 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_smc_acpi_level()
2981 table->ACPILevel.DeepSleepDivId = 0; in ci_populate_smc_acpi_level()
2989 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in ci_populate_smc_acpi_level()
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Dsmu7_fusion.h234 SMU7_Fusion_ACPILevel ACPILevel; member
Dsmu7_discrete.h326 SMU7_Discrete_ACPILevel ACPILevel; member
/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/inc/
Dsmu7_fusion.h234 SMU7_Fusion_ACPILevel ACPILevel; member
Dsmu7_discrete.h327 SMU7_Discrete_ACPILevel ACPILevel; member
Dsmu71_discrete.h274 SMU71_Discrete_ACPILevel ACPILevel; member
Dsmu72_discrete.h269 SMU72_Discrete_ACPILevel ACPILevel; member
Dsmu73_discrete.h253 SMU73_Discrete_ACPILevel ACPILevel; member
Dsmu74_discrete.h286 SMU74_Discrete_ACPILevel ACPILevel; member
Dsmu75_discrete.h291 SMU75_Discrete_ACPILevel ACPILevel; member