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Searched refs:smu7_data (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dfiji_smumgr.h41 struct smu7_smumgr smu7_data; member
Dfiji_smumgr.c310 &(priv->smu7_data.soft_regs_start), 0x40000); in fiji_start_smu()
1010 uint32_t array = smu_data->smu7_data.dpm_table_start + in fiji_populate_all_graphic_levels()
1226 uint32_t array = smu_data->smu7_data.dpm_table_start + in fiji_populate_all_memory_levels()
1546 smu_data->smu7_data.arb_table_start, in fiji_program_memory_timing_parameters()
1876 smu_data->smu7_data.arb_table_start, &tmp, SMC_RAM_END); in fiji_init_arb_table_index()
1885 smu_data->smu7_data.arb_table_start, tmp, SMC_RAM_END); in fiji_init_arb_table_index()
2105 smu_data->smu7_data.dpm_table_start + in fiji_init_smc_table()
2146 if (smu_data->smu7_data.fan_table_start == 0) { in fiji_thermal_setup_fan_table()
2212 res = smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.fan_table_start, in fiji_thermal_setup_fan_table()
2279 smu_data->smu7_data.dpm_table_start + in fiji_update_sclk_threshold()
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Diceland_smumgr.c253 &(priv->smu7_data.soft_regs_start), 0x40000); in iceland_start_smu()
964 uint32_t level_array_adress = smu_data->smu7_data.dpm_table_start + in iceland_populate_all_graphic_levels()
1354 …uint32_t level_array_adress = smu_data->smu7_data.dpm_table_start + offsetof(SMU71_Discrete_DpmTab… in iceland_populate_all_memory_levels()
1637 smu_data->smu7_data.arb_table_start, in iceland_program_memory_timing_parameters()
1794 …address = smu_data->smu7_data.mc_reg_table_start + (uint32_t)offsetof(SMU71_Discrete_MCRegisters, … in iceland_update_and_upload_mc_reg_table()
1816 return smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.mc_reg_table_start, in iceland_populate_initial_mc_reg_table()
2057 result = smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.dpm_table_start + in iceland_init_smc_table()
2068 smu_data->smu7_data.ulv_setting_starts, in iceland_init_smc_table()
2087 struct smu7_smumgr *smu7_data = (struct smu7_smumgr *)(hwmgr->smu_backend); in iceland_thermal_setup_fan_table() local
2105 if (0 == smu7_data->fan_table_start) { in iceland_thermal_setup_fan_table()
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Dpolaris10_smumgr.c300 …smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS… in polaris10_start_smu()
316 &(smu_data->smu7_data.soft_regs_start), 0x40000); in polaris10_start_smu()
1046 uint32_t array = smu_data->smu7_data.dpm_table_start + in polaris10_populate_all_graphic_levels()
1215 uint32_t array = smu_data->smu7_data.dpm_table_start + in polaris10_populate_all_memory_levels()
1513 smu_data->smu7_data.arb_table_start, in polaris10_program_memory_timing_parameters()
1749 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, smu_data->smu7_data.soft_regs_start + in polaris10_populate_vr_config()
1758 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, smu_data->smu7_data.soft_regs_start + in polaris10_populate_vr_config()
2119 smu_data->smu7_data.dpm_table_start + in polaris10_init_smc_table()
2184 if (smu_data->smu7_data.fan_table_start == 0) { in polaris10_thermal_setup_fan_table()
2254 res = smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.fan_table_start, in polaris10_thermal_setup_fan_table()
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Dvegam_smumgr.c201 smu_data->smu7_data.security_hard_key = (uint8_t)(PHM_READ_VFPF_INDIRECT_FIELD( in vegam_start_smu()
217 &(smu_data->smu7_data.soft_regs_start), in vegam_start_smu()
239 smu_data->smu7_data.dpm_table_start = tmp; in vegam_process_firmware_header()
250 smu_data->smu7_data.soft_regs_start = tmp; in vegam_process_firmware_header()
261 smu_data->smu7_data.mc_reg_table_start = tmp; in vegam_process_firmware_header()
269 smu_data->smu7_data.fan_table_start = tmp; in vegam_process_firmware_header()
279 smu_data->smu7_data.arb_table_start = tmp; in vegam_process_firmware_header()
342 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU75_Discrete_DpmTable, in vegam_update_uvd_smc_table()
378 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in vegam_update_vce_smc_table()
875 uint32_t array = smu_data->smu7_data.dpm_table_start + in vegam_populate_all_graphic_levels()
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Dpolaris10_smumgr.h55 struct smu7_smumgr smu7_data; member
Dtonga_smumgr.c220 &(priv->smu7_data.soft_regs_start), 0x40000); in tonga_start_smu()
694 uint32_t level_array_address = smu_data->smu7_data.dpm_table_start + in tonga_populate_all_graphic_levels()
1096 smu_data->smu7_data.dpm_table_start + in tonga_populate_all_memory_levels()
1512 smu_data->smu7_data.arb_table_start, in tonga_program_memory_timing_parameters()
1813 smu_data->smu7_data.arb_table_start, &tmp, SMC_RAM_END); in tonga_init_arb_table_index()
1822 smu_data->smu7_data.arb_table_start, tmp, SMC_RAM_END); in tonga_init_arb_table_index()
2173 address = smu_data->smu7_data.mc_reg_table_start + in tonga_update_and_upload_mc_reg_table()
2200 return smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.mc_reg_table_start, in tonga_populate_initial_mc_reg_table()
2437 smu_data->smu7_data.dpm_table_start + offsetof(SMU72_Discrete_DpmTable, SystemFlags), in tonga_init_smc_table()
2482 if (0 == smu_data->smu7_data.fan_table_start) { in tonga_thermal_setup_fan_table()
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Dvegam_smumgr.h64 struct smu7_smumgr smu7_data; member
Diceland_smumgr.h61 struct smu7_smumgr smu7_data; member
Dtonga_smumgr.h65 struct smu7_smumgr smu7_data; member
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.c5302 smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, DisplayWatermark), in smu7_set_watermarks_for_clocks_ranges()