/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/core/ |
D | ramht.c | 27 nvkm_ramht_hash(struct nvkm_ramht *ramht, int chid, u32 handle) in nvkm_ramht_hash() argument 32 hash ^= (handle & ((1 << ramht->bits) - 1)); in nvkm_ramht_hash() 33 handle >>= ramht->bits; in nvkm_ramht_hash() 36 hash ^= chid << (ramht->bits - 4); in nvkm_ramht_hash() 41 nvkm_ramht_search(struct nvkm_ramht *ramht, int chid, u32 handle) in nvkm_ramht_search() argument 45 co = ho = nvkm_ramht_hash(ramht, chid, handle); in nvkm_ramht_search() 47 if (ramht->data[co].chid == chid) { in nvkm_ramht_search() 48 if (ramht->data[co].handle == handle) in nvkm_ramht_search() 49 return ramht->data[co].inst; in nvkm_ramht_search() 52 if (++co >= ramht->size) in nvkm_ramht_search() [all …]
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D | Kbuild | 15 nvkm-y += nvkm/core/ramht.o
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/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
D | nv17.c | 56 struct nvkm_ramht *ramht = imem->ramht; in nv17_fifo_init() local 64 ((ramht->bits - 9) << 16) | in nv17_fifo_init() 65 (ramht->gpuobj->addr >> 8)); in nv17_fifo_init()
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D | nv40.c | 66 struct nvkm_ramht *ramht = imem->ramht; in nv40_fifo_init() local 75 ((ramht->bits - 9) << 16) | in nv40_fifo_init() 76 (ramht->gpuobj->addr >> 8)); in nv40_fifo_init()
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D | channv50.c | 162 nvkm_ramht_remove(chan->ramht, cookie); in nv50_fifo_chan_object_dtor() 183 return nvkm_ramht_insert(chan->ramht, object, 0, 4, handle, context); in nv50_fifo_chan_object_ctor() 217 nvkm_ramht_del(&chan->ramht); in nv50_fifo_chan_dtor() 275 return nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht); in nv50_fifo_chan_ctor()
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D | gpfifonv50.c | 80 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in nv50_fifo_gpfifo_new() 82 (chan->ramht->gpuobj->node->offset >> 4)); in nv50_fifo_gpfifo_new()
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D | gpfifog84.c | 80 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in g84_fifo_gpfifo_new() 82 (chan->ramht->gpuobj->node->offset >> 4)); in g84_fifo_gpfifo_new()
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D | nv04.c | 336 struct nvkm_ramht *ramht = imem->ramht; in nv04_fifo_init() local 344 ((ramht->bits - 9) << 16) | in nv04_fifo_init() 345 (ramht->gpuobj->addr >> 8)); in nv04_fifo_init()
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D | channv50.h | 16 struct nvkm_ramht *ramht; member
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D | chang84.c | 180 return nvkm_ramht_insert(chan->ramht, object, 0, 4, handle, context); in g84_fifo_chan_object_ctor() 262 return nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht); in g84_fifo_chan_ctor()
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D | dmanv04.c | 42 nvkm_ramht_remove(imem->ramht, cookie); in nv04_fifo_dma_object_dtor() 67 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4, in nv04_fifo_dma_object_ctor()
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D | dmanv40.c | 171 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4, in nv40_fifo_dma_object_ctor()
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/linux-5.19.10/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
D | instmem.h | 22 struct nvkm_ramht *ramht; member
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/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
D | nv04.c | 178 ret = nvkm_ramht_new(device, 0x08000, 0, NULL, &imem->base.ramht); in nv04_instmem_oneinit() 203 nvkm_ramht_del(&imem->base.ramht); in nv04_instmem_dtor()
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D | nv40.c | 190 ret = nvkm_ramht_new(device, 0x08000, 0, NULL, &imem->base.ramht); in nv40_instmem_oneinit() 219 nvkm_ramht_del(&imem->base.ramht); in nv40_instmem_dtor()
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/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
D | dmacgf119.c | 33 return nvkm_ramht_insert(chan->disp->ramht, object, in gf119_disp_dmac_bind()
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D | dmacgv100.c | 44 return nvkm_ramht_insert(chan->disp->ramht, object, in gv100_disp_dmac_bind()
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D | nv50.h | 38 struct nvkm_ramht *ramht; member
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D | dmacnv50.c | 73 return nvkm_ramht_insert(chan->disp->ramht, object, in nv50_disp_dmac_bind()
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D | nv50.c | 71 nvkm_ramht_del(&disp->ramht); in nv50_disp_dtor_() 142 0x1000, 0, disp->inst, &disp->ramht); in nv50_disp_oneinit_()
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D | channv50.c | 235 nvkm_ramht_remove(object->disp->ramht, object->hash); in nv50_disp_chan_child_del_()
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