/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
D | gpfifog84.c | 71 nvkm_kmap(chan->ramfc); in g84_fifo_gpfifo_new() 72 nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078); in g84_fifo_gpfifo_new() 73 nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); in g84_fifo_gpfifo_new() 74 nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); in g84_fifo_gpfifo_new() 75 nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(ioffset)); in g84_fifo_gpfifo_new() 76 nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16)); in g84_fifo_gpfifo_new() 77 nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); in g84_fifo_gpfifo_new() 78 nvkm_wo32(chan->ramfc, 0x78, 0x00000000); in g84_fifo_gpfifo_new() 79 nvkm_wo32(chan->ramfc, 0x7c, 0x30000001); in g84_fifo_gpfifo_new() 80 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in g84_fifo_gpfifo_new() [all …]
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D | dmanv40.c | 88 nvkm_kmap(imem->ramfc); in nv40_fifo_dma_engine_fini() 89 nvkm_wo32(imem->ramfc, chan->ramfc + ctx, 0x00000000); in nv40_fifo_dma_engine_fini() 90 nvkm_done(imem->ramfc); in nv40_fifo_dma_engine_fini() 119 nvkm_kmap(imem->ramfc); in nv40_fifo_dma_engine_init() 120 nvkm_wo32(imem->ramfc, chan->ramfc + ctx, inst); in nv40_fifo_dma_engine_init() 121 nvkm_done(imem->ramfc); in nv40_fifo_dma_engine_init() 230 chan->ramfc = chan->base.chid * 128; in nv40_fifo_dma_new() 232 nvkm_kmap(imem->ramfc); in nv40_fifo_dma_new() 233 nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); in nv40_fifo_dma_new() 234 nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); in nv40_fifo_dma_new() [all …]
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D | dmanv10.c | 74 chan->ramfc = chan->base.chid * 32; in nv10_fifo_dma_new() 76 nvkm_kmap(imem->ramfc); in nv10_fifo_dma_new() 77 nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); in nv10_fifo_dma_new() 78 nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); in nv10_fifo_dma_new() 79 nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); in nv10_fifo_dma_new() 80 nvkm_wo32(imem->ramfc, chan->ramfc + 0x14, in nv10_fifo_dma_new() 87 nvkm_done(imem->ramfc); in nv10_fifo_dma_new()
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D | dmanv17.c | 75 chan->ramfc = chan->base.chid * 64; in nv17_fifo_dma_new() 77 nvkm_kmap(imem->ramfc); in nv17_fifo_dma_new() 78 nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); in nv17_fifo_dma_new() 79 nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); in nv17_fifo_dma_new() 80 nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); in nv17_fifo_dma_new() 81 nvkm_wo32(imem->ramfc, chan->ramfc + 0x14, in nv17_fifo_dma_new() 88 nvkm_done(imem->ramfc); in nv17_fifo_dma_new()
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D | gpfifonv50.c | 71 nvkm_kmap(chan->ramfc); in nv50_fifo_gpfifo_new() 72 nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078); in nv50_fifo_gpfifo_new() 73 nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); in nv50_fifo_gpfifo_new() 74 nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); in nv50_fifo_gpfifo_new() 75 nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(ioffset)); in nv50_fifo_gpfifo_new() 76 nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16)); in nv50_fifo_gpfifo_new() 77 nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); in nv50_fifo_gpfifo_new() 78 nvkm_wo32(chan->ramfc, 0x78, 0x00000000); in nv50_fifo_gpfifo_new() 79 nvkm_wo32(chan->ramfc, 0x7c, 0x30000001); in nv50_fifo_gpfifo_new() 80 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in nv50_fifo_gpfifo_new() [all …]
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D | dmanv04.c | 79 struct nvkm_memory *fctx = device->imem->ramfc; in nv04_fifo_dma_fini() 83 u32 data = chan->ramfc; in nv04_fifo_dma_fini() 97 c = fifo->ramfc; in nv04_fifo_dma_fini() 108 c = fifo->ramfc; in nv04_fifo_dma_fini() 145 const struct nv04_fifo_ramfc *c = fifo->ramfc; in nv04_fifo_dma_dtor() 147 nvkm_kmap(imem->ramfc); in nv04_fifo_dma_dtor() 149 nvkm_wo32(imem->ramfc, chan->ramfc + c->ctxp, 0x00000000); in nv04_fifo_dma_dtor() 151 nvkm_done(imem->ramfc); in nv04_fifo_dma_dtor() 203 chan->ramfc = chan->base.chid * 32; in nv04_fifo_dma_new() 205 nvkm_kmap(imem->ramfc); in nv04_fifo_dma_new() [all …]
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D | nv17.c | 58 struct nvkm_memory *ramfc = imem->ramfc; in nv17_fifo_init() local 67 nvkm_wr32(device, NV03_PFIFO_RAMFC, nvkm_memory_addr(ramfc) >> 8 | in nv17_fifo_init()
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D | nv40.c | 68 struct nvkm_memory *ramfc = imem->ramfc; in nv40_fifo_init() local 96 nvkm_memory_addr(ramfc)) >> 16) | in nv40_fifo_init()
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D | nv04.c | 338 struct nvkm_memory *ramfc = imem->ramfc; in nv04_fifo_init() local 347 nvkm_wr32(device, NV03_PFIFO_RAMFC, nvkm_memory_addr(ramfc) >> 8); in nv04_fifo_init() 361 enum nvkm_subdev_type type, int inst, int nr, const struct nv04_fifo_ramfc *ramfc, in nv04_fifo_new_() argument 369 fifo->ramfc = ramfc; in nv04_fifo_new_()
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D | channv50.c | 206 u64 addr = chan->ramfc->addr >> 12; in nv50_fifo_chan_init() 221 nvkm_gpuobj_del(&chan->ramfc); in nv50_fifo_chan_dtor() 261 &chan->ramfc); in nv50_fifo_chan_ctor()
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D | nv04.h | 17 const struct nv04_fifo_ramfc *ramfc; member
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D | channv04.h | 11 u32 ramfc; member
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D | channv50.h | 12 struct nvkm_gpuobj *ramfc; member
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D | chang84.c | 189 u64 addr = chan->ramfc->addr >> 8; in g84_fifo_chan_init() 258 &chan->ramfc); in g84_fifo_chan_ctor()
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/linux-5.19.10/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
D | instmem.h | 24 struct nvkm_memory *ramfc; member
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/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
D | nv04.c | 184 &imem->base.ramfc); in nv04_instmem_oneinit() 201 nvkm_memory_unref(&imem->base.ramfc); in nv04_instmem_dtor()
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D | nv40.c | 206 &imem->base.ramfc); in nv40_instmem_oneinit() 217 nvkm_memory_unref(&imem->base.ramfc); in nv40_instmem_dtor()
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