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Searched refs:mmSPI_GDBG_WAVE_CNTL2 (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v10_3.c742 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL2), data);
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2721 #define mmSPI_GDBG_WAVE_CNTL2 … macro
Dgc_9_2_1_offset.h2907 #define mmSPI_GDBG_WAVE_CNTL2 … macro
Dgc_10_3_0_offset.h4850 #define mmSPI_GDBG_WAVE_CNTL2 … macro