Searched refs:mmDMA5_CORE_WR_RATE_LIM_CFG_1 (Results 1 – 2 of 2) sorted by relevance
116 #define mmDMA5_CORE_WR_RATE_LIM_CFG_1 0x5A015C macro
5025 mask |= 1U << ((mmDMA5_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()