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Searched refs:mmCP_HQD_PQ_WPTR_LO (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v10.c260 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO, in kgd_hqd_load()
Damdgpu_amdkfd_gfx_v9.c274 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_LO), in kgd_gfx_v9_hqd_load()
Damdgpu_amdkfd_gfx_v10_3.c247 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO, in hqd_load_v10_3()
Dgfx_v9_0.c3602 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO, in gfx_v9_0_kiq_init_register()
3661 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO, in gfx_v9_0_kiq_init_register()
3716 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO, 0); in gfx_v9_0_kiq_fini_register()
Dgfx_v10_0.c6972 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO, in gfx_v10_0_kiq_init_register()
7035 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO, in gfx_v10_0_kiq_init_register()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2931 #define mmCP_HQD_PQ_WPTR_LO macro
Dgc_9_1_offset.h3159 #define mmCP_HQD_PQ_WPTR_LO macro
Dgc_9_2_1_offset.h3115 #define mmCP_HQD_PQ_WPTR_LO macro
Dgc_10_1_0_offset.h5395 #define mmCP_HQD_PQ_WPTR_LO macro
Dgc_10_3_0_offset.h5030 #define mmCP_HQD_PQ_WPTR_LO macro