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Searched refs:mmCM0_CM_CONTROL (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h1503 #define mmCM0_CM_CONTROL macro
Ddcn_3_0_3_offset.h2617 #define mmCM0_CM_CONTROL macro
Ddcn_3_0_1_offset.h3428 #define mmCM0_CM_CONTROL macro
Ddcn_1_0_offset.h3582 #define mmCM0_CM_CONTROL macro
Ddcn_2_1_0_offset.h3434 #define mmCM0_CM_CONTROL macro
Ddcn_3_0_2_offset.h3973 #define mmCM0_CM_CONTROL macro
Ddcn_2_0_0_offset.h4372 #define mmCM0_CM_CONTROL macro
Ddcn_3_0_0_offset.h4019 #define mmCM0_CM_CONTROL macro