Searched refs:max_sclk (Results 1 – 6 of 6) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/radeon/ |
| D | btc_dpm.h | 45 const u32 max_sclk, const u32 max_mclk,
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| D | btc_dpm.c | 1234 u32 max_sclk, u32 requested_sclk) in btc_get_valid_sclk() argument
1237 max_sclk, requested_sclk); in btc_get_valid_sclk()
1241 const u32 max_sclk, const u32 max_mclk, in btc_skip_blacklist_clocks() argument
1259 *sclk = btc_get_valid_sclk(rdev, max_sclk, *sclk + 1); in btc_skip_blacklist_clocks()
1261 if (*sclk < max_sclk) in btc_skip_blacklist_clocks()
1262 btc_skip_blacklist_clocks(rdev, max_sclk, max_mclk, sclk, mclk); in btc_skip_blacklist_clocks()
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| D | si_dpm.c | 2275 u32 max_sclk; in si_populate_power_containment_values() local
2304 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()
2310 if (prev_sclk > max_sclk) in si_populate_power_containment_values()
2314 (prev_sclk == max_sclk) || in si_populate_power_containment_values()
2316 min_sclk = max_sclk; in si_populate_power_containment_values()
2350 …te->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
2956 u32 max_sclk = 0, max_mclk = 0; in si_apply_state_adjust_rules() local
2965 max_sclk = 75000; in si_apply_state_adjust_rules()
2969 max_sclk = 60000; in si_apply_state_adjust_rules()
2980 max_sclk = 75000; in si_apply_state_adjust_rules()
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| D | ni_dpm.c | 2459 u32 max_sclk; in ni_populate_power_containment_values() local
2503 max_sclk = state->performance_levels[i].sclk; in ni_populate_power_containment_values()
2507 if (max_sclk < prev_sclk) in ni_populate_power_containment_values()
2510 if ((max_ps_percent == 0) || (prev_sclk == max_sclk) || eg_pi->uvd_enabled) in ni_populate_power_containment_values()
2511 min_sclk = max_sclk; in ni_populate_power_containment_values()
2524 (u8)((NISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in ni_populate_power_containment_values()
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| /linux-5.19.10/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| D | si_dpm.c | 2389 u32 max_sclk; in si_populate_power_containment_values() local
2418 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()
2424 if (prev_sclk > max_sclk) in si_populate_power_containment_values()
2428 (prev_sclk == max_sclk) || in si_populate_power_containment_values()
2430 min_sclk = max_sclk; in si_populate_power_containment_values()
2463 …te->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
3239 u32 max_sclk, u32 requested_sclk) in btc_get_valid_sclk() argument
3242 max_sclk, requested_sclk); in btc_get_valid_sclk()
3432 u32 max_sclk = 0, max_mclk = 0; in si_apply_state_adjust_rules() local
3441 max_sclk = 75000; in si_apply_state_adjust_rules()
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| /linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | smu7_hwmgr.c | 4077 uint32_t sclk, max_sclk = 0; in smu7_get_maximum_link_speed() local
4083 if (max_sclk < sclk) in smu7_get_maximum_link_speed()
4084 max_sclk = sclk; in smu7_get_maximum_link_speed()
4088 if (dpm_table->sclk_table.dpm_levels[i].value == max_sclk) in smu7_get_maximum_link_speed()
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