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Searched refs:ixAZALIA_INPUT_CRC0_CHANNEL4 (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_d.h6699 #define ixAZALIA_INPUT_CRC0_CHANNEL4 0x4 macro
Ddce_11_0_d.h6861 #define ixAZALIA_INPUT_CRC0_CHANNEL4 0x4 macro
Ddce_11_2_d.h8206 #define ixAZALIA_INPUT_CRC0_CHANNEL4 0x4 macro
Ddce_12_0_offset.h18088 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7371 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_3_0_1_offset.h12214 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_1_0_offset.h13058 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_2_1_0_offset.h12818 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_3_1_2_offset.h14028 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_3_1_5_offset.h14134 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_3_0_2_offset.h15103 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_3_1_6_offset.h14625 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_2_0_0_offset.h16482 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro
Ddcn_3_0_0_offset.h16825 #define ixAZALIA_INPUT_CRC0_CHANNEL4 … macro