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Searched refs:imx_clk_hw_divider_flags (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/drivers/clk/imx/ !
Dclk-imx7ulp.c77 …hws[IMX7ULP_CLK_APLL_PRE_DIV] = imx_clk_hw_divider_flags("apll_pre_div", "apll_pre_sel", base + 0x… in imx7ulp_clk_scg1_init()
78 …hws[IMX7ULP_CLK_SPLL_PRE_DIV] = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x… in imx7ulp_clk_scg1_init()
110 …hws[IMX7ULP_CLK_CORE_DIV] = imx_clk_hw_divider_flags("divcore", "scs_sel", base + 0x14, 16, 4, CL… in imx7ulp_clk_scg1_init()
112 …hws[IMX7ULP_CLK_HSRUN_CORE_DIV] = imx_clk_hw_divider_flags("hsrun_divcore", "hsrun_scs_sel", base … in imx7ulp_clk_scg1_init()
118 …hws[IMX7ULP_CLK_NIC0_DIV] = imx_clk_hw_divider_flags("nic0_clk", "nic_sel", base + 0x40, 24, 4, … in imx7ulp_clk_scg1_init()
119 …hws[IMX7ULP_CLK_NIC1_DIV] = imx_clk_hw_divider_flags("nic1_clk", "nic0_clk", base + 0x40, 16, 4, … in imx7ulp_clk_scg1_init()
120 …hws[IMX7ULP_CLK_NIC1_BUS_DIV] = imx_clk_hw_divider_flags("nic1_bus_clk", "nic0_clk", base + 0x40, … in imx7ulp_clk_scg1_init()
Dclk-imx8ulp.c197 …clks[IMX8ULP_CLK_A35_DIV] = imx_clk_hw_divider_flags("a35_div", "a35_sel", base + 0x14, 21, 6, CLK… in imx8ulp_clk_cgc1_init()
200 …clks[IMX8ULP_CLK_NIC_AD_DIVPLAT] = imx_clk_hw_divider_flags("nic_ad_divplat", "nic_sel", base + 0x… in imx8ulp_clk_cgc1_init()
201 …clks[IMX8ULP_CLK_NIC_PER_DIVPLAT] = imx_clk_hw_divider_flags("nic_per_divplat", "nic_ad_divplat", … in imx8ulp_clk_cgc1_init()
202 …clks[IMX8ULP_CLK_XBAR_AD_DIVPLAT] = imx_clk_hw_divider_flags("xbar_ad_divplat", "nic_ad_divplat", … in imx8ulp_clk_cgc1_init()
203 …clks[IMX8ULP_CLK_XBAR_DIVBUS] = imx_clk_hw_divider_flags("xbar_divbus", "nic_ad_divplat", base + 0… in imx8ulp_clk_cgc1_init()
204 …clks[IMX8ULP_CLK_XBAR_AD_SLOW] = imx_clk_hw_divider_flags("xbar_ad_slow", "nic_ad_divplat", base +… in imx8ulp_clk_cgc1_init()
259 …clks[IMX8ULP_CLK_DDR_DIV] = imx_clk_hw_divider_flags("ddr_div", "ddr_sel", base + 0x40, 21, 6, CLK… in imx8ulp_clk_cgc2_init()
261 …clks[IMX8ULP_CLK_LPAV_AXI_DIV] = imx_clk_hw_divider_flags("lpav_axi_div", "lpav_sel", base + 0x3c,… in imx8ulp_clk_cgc2_init()
262 …clks[IMX8ULP_CLK_LPAV_AHB_DIV] = imx_clk_hw_divider_flags("lpav_ahb_div", "lpav_axi_div", base + 0… in imx8ulp_clk_cgc2_init()
263 …clks[IMX8ULP_CLK_LPAV_BUS_DIV] = imx_clk_hw_divider_flags("lpav_bus_div", "lpav_axi_div", base + 0… in imx8ulp_clk_cgc2_init()
Dclk.h124 to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))
217 #define imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags) \ macro
Dclk-imx6q.c746 …hws[IMX6QDL_CLK_LDB_DI0_PODF] = imx_clk_hw_divider_flags("ldb_di0_podf", "ldb_di0_div_3_5", ba… in imx6q_clocks_init()
747 …hws[IMX6QDL_CLK_LDB_DI1_PODF] = imx_clk_hw_divider_flags("ldb_di1_podf", "ldb_di1_div_3_5", ba… in imx6q_clocks_init()
Dclk-imx6sx.c322 …hws[IMX6SX_CLK_PERCLK] = imx_clk_hw_divider_flags("perclk", "perclk_sel", base + 0x1c,… in imx6sx_clocks_init()
Dclk-imx7d.c709 …hws[IMX7D_IPG_ROOT_CLK] = imx_clk_hw_divider_flags("ipg_root_clk", "ahb_root_clk", base + 0x9080, … in imx7d_clocks_init()