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123

/linux-5.19.10/drivers/infiniband/hw/irdma/
Di40iw_hw.h34 #define I40E_GLHMC_VFPDINV(_i) (0x000C8300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ argument
38 #define I40E_GLPES_PFIP4RXDISCARD(_i) (0x00010600 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
39 #define I40E_GLPES_PFIP4RXTRUNC(_i) (0x00010700 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
40 #define I40E_GLPES_PFIP4TXNOROUTE(_i) (0x00012E00 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
41 #define I40E_GLPES_PFIP6RXDISCARD(_i) (0x00011200 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
42 #define I40E_GLPES_PFIP6RXTRUNC(_i) (0x00011300 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
44 #define I40E_GLPES_PFRDMAVBNDLO(_i) (0x00014800 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
45 #define I40E_GLPES_PFIP4TXMCOCTSLO(_i) (0x00012000 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
46 #define I40E_GLPES_PFIP6RXMCOCTSLO(_i) (0x00011600 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
47 #define I40E_GLPES_PFIP6TXMCOCTSLO(_i) (0x00012A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
[all …]
Dicrdma_hw.h19 #define VFINT_DYN_CTLN(_i) (0x00003800 + ((_i) * 4)) /* _i=0...63 */ argument
40 #define GLHMC_VFPDINV(_i) (0x00528300 + ((_i) * 4)) /* _i=0...31 */ argument
/linux-5.19.10/drivers/net/ethernet/intel/i40e/
Di40e_register.h71 #define I40E_PRTDCB_RETSTCC(_i) (0x00122180 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
106 #define I40E_PRTDCB_RUPTQ(_i) (0x00122400 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
113 #define I40E_PRTDCB_TCMSTC(_i) (0x000A0040 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
124 #define I40E_PRTDCB_TCWSTC(_i) (0x000A2040 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
164 #define I40E_PRTDCB_TPFCTS(_i) (0x001E4660 + ((_i) * 32)) /* _i=0...7 */ /* Reset: GLOBR */ argument
179 #define I40E_GLGEN_GPIO_CTL(_i) (0x00088100 + ((_i) * 4)) /* _i=0...29 */ /* Reset: POR */ argument
199 #define I40E_GLGEN_MDIO_I2C_SEL(_i) (0x000881C0 + ((_i) * 4)) /* _i=0...3 */ /* Reset: POR */ argument
200 #define I40E_GLGEN_MSCA(_i) (0x0008818C + ((_i) * 4)) /* _i=0...3 */ /* Reset: POR */ argument
210 #define I40E_GLGEN_MSRWD(_i) (0x0008819C + ((_i) * 4)) /* _i=0...3 */ /* Reset: POR */ argument
233 #define I40E_GLGEN_VFLRSTAT(_i) (0x00092600 + ((_i) * 4)) /* _i=0...3 */ /* Reset: CORER */ argument
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/linux-5.19.10/drivers/net/ethernet/intel/ice/
Dice_hw_autogen.h111 #define GL_PREEXT_L2_PMASK0(_i) (0x0020F0FC + ((_i) * 4)) argument
112 #define GL_PREEXT_L2_PMASK1(_i) (0x0020F108 + ((_i) * 4)) argument
113 #define GLFLXP_RXDID_FLX_WRD_0(_i) (0x0045c800 + ((_i) * 4)) argument
118 #define GLFLXP_RXDID_FLX_WRD_1(_i) (0x0045c900 + ((_i) * 4)) argument
123 #define GLFLXP_RXDID_FLX_WRD_2(_i) (0x0045ca00 + ((_i) * 4)) argument
128 #define GLFLXP_RXDID_FLX_WRD_3(_i) (0x0045cb00 + ((_i) * 4)) argument
142 #define GLGEN_GPIO_CTL(_i) (0x000880C8 + ((_i) * 4)) argument
157 #define GLGEN_VFLRSTAT(_i) (0x00093A04 + ((_i) * 4)) argument
190 #define GLINT_ITR(_i, _INT) (0x00154000 + ((_i) * 8192 + (_INT) * 4)) argument
258 #define QRX_CONTEXT(_i, _QRX) (0x00280000 + ((_i) * 8192 + (_QRX) * 4)) argument
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/linux-5.19.10/include/math-emu/
Dop-8.h36 _FP_I_TYPE _up, _down, _skip, _i; \
41 for (_i = 7; _i >= _skip; --_i) \
42 X##_f[_i] = X##_f[_i-_skip]; \
45 for (_i = 7; _i > _skip; --_i) \
46 X##_f[_i] = X##_f[_i-_skip] << _up \
47 | X##_f[_i-_skip-1] >> _down; \
48 X##_f[_i--] = X##_f[0] << _up; \
50 for (; _i >= 0; --_i) \
51 X##_f[_i] = 0; \
56 _FP_I_TYPE _up, _down, _skip, _i; \
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Dop-4.h39 _FP_I_TYPE _up, _down, _skip, _i; \
44 for (_i = 3; _i >= _skip; --_i) \
45 X##_f[_i] = X##_f[_i-_skip]; \
48 for (_i = 3; _i > _skip; --_i) \
49 X##_f[_i] = X##_f[_i-_skip] << _up \
50 | X##_f[_i-_skip-1] >> _down; \
51 X##_f[_i--] = X##_f[0] << _up; \
53 for (; _i >= 0; --_i) \
54 X##_f[_i] = 0; \
60 _FP_I_TYPE _up, _down, _skip, _i; \
[all …]
/linux-5.19.10/drivers/net/ethernet/intel/ixgbe/
Dixgbe_type.h259 #define IXGBE_EICS_EX(_i) (0x00A90 + (_i) * 4) argument
260 #define IXGBE_EIMS_EX(_i) (0x00AA0 + (_i) * 4) argument
261 #define IXGBE_EIMC_EX(_i) (0x00AB0 + (_i) * 4) argument
262 #define IXGBE_EIAM_EX(_i) (0x00AD0 + (_i) * 4) argument
272 #define IXGBE_EITR(_i) (((_i) <= 23) ? (0x00820 + ((_i) * 4)) : \ argument
273 (0x012300 + (((_i) - 24) * 4)))
277 #define IXGBE_IVAR(_i) (0x00900 + ((_i) * 4)) /* 24 at 0x900-0x960 */ argument
282 #define IXGBE_PBACL(_i) (((_i) == 0) ? (0x11068) : (0x110C0 + ((_i) * 4))) argument
290 #define IXGBE_FCRTH_82599(_i) (0x03260 + ((_i) * 4)) /* 8 of these (0-7) */ argument
291 #define IXGBE_FCRTL_82599(_i) (0x03220 + ((_i) * 4)) /* 8 of these (0-7) */ argument
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/linux-5.19.10/drivers/net/dsa/
Dqca8k.h91 #define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) argument
105 #define QCA8K_REG_PORT_HDR_CTRL(_i) (0x9c + (_i * 4)) argument
130 #define QCA8K_REG_EEE_CTRL_LPI_EN(_i) ((_i + 1) * 2) argument
141 #define QCA8K_REG_PORT_VLAN_CTRL0(_i) (0x420 + (_i * 8)) argument
146 #define QCA8K_REG_PORT_VLAN_CTRL1(_i) (0x424 + (_i * 8)) argument
178 #define QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i) (4 + (_i) * 2) argument
180 #define QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(_i) (GENMASK(1, 0) << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHI… argument
182 …e QCA8K_VTU_FUNC0_EG_MODE_PORT_UNMOD(_i) (QCA8K_VTU_FUNC0_EG_MODE_UNMOD << QCA8K_VTU_FUNC0_EG_MO… argument
184 …e QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(_i) (QCA8K_VTU_FUNC0_EG_MODE_UNTAG << QCA8K_VTU_FUNC0_EG_MO… argument
186 …ine QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(_i) (QCA8K_VTU_FUNC0_EG_MODE_TAG << QCA8K_VTU_FUNC0_EG_MOD… argument
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/linux-5.19.10/drivers/input/mouse/
Dalps.h92 #define SS4_MF_LF_V2(_b, _i) ((_b[1 + (_i) * 3] & 0x0004) == 0x0004) argument
96 #define SS4_STD_MF_X_V2(_b, _i) (((_b[0 + (_i) * 3] << 5) & 0x00E0) | \ argument
97 ((_b[1 + _i * 3] << 5) & 0x1F00) \
100 #define SS4_PLUS_STD_MF_X_V2(_b, _i) (((_b[0 + (_i) * 3] << 4) & 0x0070) | \ argument
101 ((_b[1 + (_i) * 3] << 4) & 0x0F80) \
104 #define SS4_STD_MF_Y_V2(_b, _i) (((_b[1 + (_i) * 3] << 3) & 0x0010) | \ argument
105 ((_b[2 + (_i) * 3] << 5) & 0x01E0) | \
106 ((_b[2 + (_i) * 3] << 4) & 0x0E00) \
109 #define SS4_BTL_MF_X_V2(_b, _i) (SS4_STD_MF_X_V2(_b, _i) | \ argument
110 ((_b[0 + (_i) * 3] >> 3) & 0x0010) \
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/linux-5.19.10/drivers/net/ethernet/intel/igb/
De1000_regs.h287 #define E1000_PSRTYPE(_i) (0x05480 + ((_i) * 4)) argument
288 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
289 (0x054E0 + ((_i - 16) * 8)))
290 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
291 (0x054E4 + ((_i - 16) * 8)))
293 #define E1000_IP4AT_REG(_i) (0x05840 + ((_i) * 8)) argument
294 #define E1000_IP6AT_REG(_i) (0x05880 + ((_i) * 4)) argument
295 #define E1000_WUPM_REG(_i) (0x05A00 + ((_i) * 4)) argument
296 #define E1000_FFMT_REG(_i) (0x09000 + ((_i) * 8)) argument
297 #define E1000_FFVT_REG(_i) (0x09800 + ((_i) * 8)) argument
[all …]
/linux-5.19.10/drivers/net/wireless/ath/ath9k/
Dreg_wow.h127 #define AR_WOW_LEN1_SHIFT(_i) ((0x3 - ((_i) & 0x3)) << 0x3) argument
128 #define AR_WOW_LENGTH1_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN1_SHIFT(_i)) argument
129 #define AR_WOW_LEN2_SHIFT(_i) ((0x7 - ((_i) & 0x7)) << 0x3) argument
130 #define AR_WOW_LENGTH2_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN2_SHIFT(_i)) argument
131 #define AR_WOW_LEN3_SHIFT(_i) ((0xb - ((_i) & 0xb)) << 0x3) argument
132 #define AR_WOW_LENGTH3_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN3_SHIFT(_i)) argument
133 #define AR_WOW_LEN4_SHIFT(_i) ((0xf - ((_i) & 0xf)) << 0x3) argument
134 #define AR_WOW_LENGTH4_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN4_SHIFT(_i)) argument
Dar9003_phy.h622 #define AR_PHY_TX_IQCAL_CORR_COEFF_B0(_i) (AR_SM_BASE + \ argument
624 0x3d0 : 0x450) + ((_i) << 2))
983 #define AR_PHY_TX_IQCAL_CORR_COEFF_B1(_i) (AR_SM1_BASE + 0x450 + ((_i) << 2)) argument
1040 #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2)) argument
1064 #define AR_PHY_NEW_ADC_DC_GAIN_CORR(_i) (AR_PHY_ADC_GAIN_DC_CORR_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1065 …define AR_PHY_NEW_ADC_DC_GAIN_CORR_9300_10(_i) (AR_PHY_ADC_GAIN_DC_CORR_0_9300_10 + (AR_PHY_CHAIN_… argument
1066 #define AR_PHY_SWITCH_CHAIN(_i) (AR_PHY_SWITCH_CHAIN_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1067 #define AR_PHY_EXT_ATTEN_CTL(_i) (AR_PHY_EXT_ATTEN_CTL_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1069 #define AR_PHY_RXGAIN(_i) (AR_PHY_FORCEMAX_GAINS_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1070 #define AR_PHY_TPCRG5(_i) (AR_PHY_TPC_5_B0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
[all …]
Dar9002_phy.h190 #define AR_PHY_TIMING_CTRL4(_i) (0x9920 + ((_i) << 12)) argument
305 #define AR_PHY_NEW_ADC_DC_GAIN_CORR(_i) (0x99b4 + ((_i) << 12)) argument
385 #define AR_PHY_CAL_MEAS_0(_i) (0x9c10 + ((_i) << 12)) argument
386 #define AR_PHY_CAL_MEAS_1(_i) (0x9c14 + ((_i) << 12)) argument
387 #define AR_PHY_CAL_MEAS_2(_i) (0x9c18 + ((_i) << 12)) argument
388 #define AR_PHY_CAL_MEAS_3(_i) (0x9c1c + ((_i) << 12)) argument
/linux-5.19.10/drivers/crypto/cavium/nitrox/
Dnitrox_csr.h21 #define EMU_BIST_STATUSX(_i) (0x1402700 + ((_i) * 0x40000)) argument
29 #define EFL_CORE_BIST_REGX(_i) (0x1240100 + ((_i) * 0x400)) argument
33 #define PEM_BIST_STATUSX(_i) (0x1080468 | ((_i) << 18)) argument
36 #define EMU_SE_ENABLEX(_i) (0x1400000 + ((_i) * 0x40000)) argument
37 #define EMU_AE_ENABLEX(_i) (0x1400008 + ((_i) * 0x40000)) argument
38 #define EMU_WD_INT_ENA_W1SX(_i) (0x1402318 + ((_i) * 0x40000)) argument
39 #define EMU_GE_INT_ENA_W1SX(_i) (0x1402518 + ((_i) * 0x40000)) argument
40 #define EMU_FUSE_MAPX(_i) (0x1402708 + ((_i) * 0x40000)) argument
43 #define UCD_SE_EID_UCODE_BLOCK_NUMX(_i) (0x12C0000 + ((_i) * 0x1000)) argument
44 #define UCD_AE_EID_UCODE_BLOCK_NUMX(_i) (0x12C0008 + ((_i) * 0x800)) argument
[all …]
/linux-5.19.10/lib/mpi/
Dmpi-internal.h64 mpi_size_t _i; \
65 for (_i = 0; _i < (n); _i++) \
66 (d)[_i] = (s)[_i]; \
71 mpi_size_t _i; \
72 for (_i = 0; _i < (n); _i++) \
73 (d)[_i] = (s)[_i]; \
79 mpi_size_t _i; \
80 for (_i = (n)-1; _i >= 0; _i--) \
81 (d)[_i] = (s)[_i]; \
87 int _i; \
[all …]
/linux-5.19.10/drivers/net/ethernet/intel/e1000e/
Dregs.h108 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
109 (0x054E0 + ((_i - 16) * 8)))
110 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
111 (0x054E4 + ((_i - 16) * 8)))
112 #define E1000_SHRAL(_i) (0x05438 + ((_i) * 8)) argument
113 #define E1000_SHRAH(_i) (0x0543C + ((_i) * 8)) argument
224 #define E1000_RETA(_i) (0x05C00 + ((_i) * 4)) /* Redirection Table - RW */ argument
225 #define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */ argument
Dich8lan.h47 #define E1000_SHRAL_PCH_LPT(_i) (0x05408 + ((_i) * 8)) argument
48 #define E1000_SHRAH_PCH_LPT(_i) (0x0540C + ((_i) * 8)) argument
125 #define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2))) argument
126 #define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2))) argument
127 #define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2))) argument
128 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2))) argument
129 #define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1))) argument
/linux-5.19.10/arch/powerpc/include/asm/
Duaccess.h427 int _i; \
429 for (_i = 0; _i < (_len & ~(sizeof(u64) - 1)); _i += sizeof(u64)) \
430 unsafe_get_user(*(u64 *)(_dst + _i), (u64 __user *)(_src + _i), e); \
432 unsafe_get_user(*(u32 *)(_dst + _i), (u32 __user *)(_src + _i), e); \
433 _i += 4; \
436 unsafe_get_user(*(u16 *)(_dst + _i), (u16 __user *)(_src + _i), e); \
437 _i += 2; \
440 unsafe_get_user(*(u8 *)(_dst + _i), (u8 __user *)(_src + _i), e); \
448 int _i; \
450 for (_i = 0; _i < (_len & ~(sizeof(u64) - 1)); _i += sizeof(u64)) \
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/linux-5.19.10/drivers/gpu/drm/armada/
Darmada_crtc.h18 #define armada_reg_queue_mod(_r, _i, _v, _m, _o) \ argument
21 __reg[_i].offset = _o; \
22 __reg[_i].mask = ~(_m); \
23 __reg[_i].val = _v; \
24 _i++; \
27 #define armada_reg_queue_set(_r, _i, _v, _o) \ argument
28 armada_reg_queue_mod(_r, _i, _v, ~0, _o)
30 #define armada_reg_queue_end(_r, _i) \ argument
31 armada_reg_queue_mod(_r, _i, 0, 0, ~0)
/linux-5.19.10/arch/s390/include/asm/
Datomic.h48 #define arch_atomic_sub(_i, _v) arch_atomic_add(-(int)(_i), _v) argument
49 #define arch_atomic_sub_return(_i, _v) arch_atomic_add_return(-(int)(_i), _v) argument
50 #define arch_atomic_fetch_sub(_i, _v) arch_atomic_fetch_add(-(int)(_i), _v) argument
146 #define arch_atomic64_sub_return(_i, _v) arch_atomic64_add_return(-(s64)(_i), _v) argument
147 #define arch_atomic64_fetch_sub(_i, _v) arch_atomic64_fetch_add(-(s64)(_i), _v) argument
148 #define arch_atomic64_sub(_i, _v) arch_atomic64_add(-(s64)(_i), _v) argument
/linux-5.19.10/drivers/net/ethernet/intel/iavf/
Diavf_register.h58 #define IAVF_VFINT_ITRN1(_i, _INTVF) (0x00002800 + ((_i) * 64 + (_INTVF) * 4)) /* _i=0...2, _INTVF=… argument
61 #define IAVF_VFQF_HENA(_i) (0x0000C400 + ((_i) * 4)) /* _i=0...1 */ /* Reset: CORER */ argument
62 #define IAVF_VFQF_HKEY(_i) (0x0000CC00 + ((_i) * 4)) /* _i=0...12 */ /* Reset: CORER */ argument
64 #define IAVF_VFQF_HLUT(_i) (0x0000D000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ argument
/linux-5.19.10/drivers/net/ethernet/intel/igbvf/
Dregs.h55 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
56 (0x054E0 + ((_i - 16) * 8)))
57 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
58 (0x054E4 + ((_i - 16) * 8)))
/linux-5.19.10/drivers/net/ethernet/intel/igc/
Digc_regs.h95 #define IGC_RETA(_i) (0x05C00 + ((_i) * 4)) argument
97 #define IGC_RSSRK(_i) (0x05C80 + ((_i) * 4)) argument
102 #define IGC_PSRTYPE(_i) (0x05480 + ((_i) * 4)) argument
222 #define IGC_IMIR(_i) (0x05A80 + ((_i) * 4)) /* Immediate Interrupt */ argument
223 #define IGC_IMIREXT(_i) (0x05AA0 + ((_i) * 4)) /* Immediate INTR Ext*/ argument
288 #define IGC_WUPM_REG(_i) (0x05A00 + ((_i) * 4)) argument
/linux-5.19.10/include/linux/
Dnospec.h53 typeof(index) _i = (index); \
55 unsigned long _mask = array_index_mask_nospec(_i, _s); \
57 BUILD_BUG_ON(sizeof(_i) > sizeof(long)); \
60 (typeof(_i)) (_i & _mask); \
/linux-5.19.10/drivers/net/wireless/ath/carl9170/
Dphy.h185 #define AR9170_PHY_REG_TIMING_CTRL4(_i) (AR9170_PHY_REG_BASE + \ argument
186 (0x0120 + ((_i) << 12)))
308 #define AR9170_PHY_REG_NEW_ADC_DC_GAIN_CORR(_i) (AR9170_PHY_REG_BASE + \ argument
309 0x01b4 + ((_i) << 12))
381 #define AR9170_PHY_REG_CAL_MEAS_0(_i) (AR9170_PHY_REG_BASE + \ argument
382 0x0410 + ((_i) << 12))
383 #define AR9170_PHY_REG_CAL_MEAS_1(_i) (AR9170_PHY_REG_BASE + \ argument
384 0x0414 \ + ((_i) << 12))
385 #define AR9170_PHY_REG_CAL_MEAS_2(_i) (AR9170_PHY_REG_BASE + \ argument
386 0x0418 + ((_i) << 12))
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