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Searched refs:WatermarkRow (Results 1 – 25 of 33) sorted by relevance

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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c365 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn316_build_watermark_ranges()
366 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn316_build_watermark_ranges()
368 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn316_build_watermark_ranges()
369 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
371 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn316_build_watermark_ranges()
373 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn316_build_watermark_ranges()
376 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn316_build_watermark_ranges()
379 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn316_build_watermark_ranges()
384 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn316_build_watermark_ranges()
385 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
[all …]
Ddcn316_smu.h98 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c396 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in vg_build_watermark_ranges()
397 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in vg_build_watermark_ranges()
399 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in vg_build_watermark_ranges()
400 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
402 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in vg_build_watermark_ranges()
404 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in vg_build_watermark_ranges()
407 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in vg_build_watermark_ranges()
410 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in vg_build_watermark_ranges()
415 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in vg_build_watermark_ranges()
416 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
[all …]
Ddcn301_smu.h77 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
131 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c424 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn31_build_watermark_ranges()
425 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn31_build_watermark_ranges()
427 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn31_build_watermark_ranges()
428 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
430 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn31_build_watermark_ranges()
432 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn31_build_watermark_ranges()
435 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn31_build_watermark_ranges()
438 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn31_build_watermark_ranges()
443 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn31_build_watermark_ranges()
444 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
[all …]
Ddcn31_smu.h74 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
231 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c359 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn315_build_watermark_ranges()
360 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn315_build_watermark_ranges()
362 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn315_build_watermark_ranges()
363 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
365 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn315_build_watermark_ranges()
367 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn315_build_watermark_ranges()
370 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn315_build_watermark_ranges()
373 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn315_build_watermark_ranges()
378 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn315_build_watermark_ranges()
379 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
[all …]
Ddcn315_smu.h90 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu_helper.c737 table->WatermarkRow[1][i].MinClock = in smu_set_watermarks_for_clocks_ranges()
741 table->WatermarkRow[1][i].MaxClock = in smu_set_watermarks_for_clocks_ranges()
745 table->WatermarkRow[1][i].MinUclk = in smu_set_watermarks_for_clocks_ranges()
749 table->WatermarkRow[1][i].MaxUclk = in smu_set_watermarks_for_clocks_ranges()
753 table->WatermarkRow[1][i].WmSetting = (uint8_t) in smu_set_watermarks_for_clocks_ranges()
758 table->WatermarkRow[0][i].MinClock = in smu_set_watermarks_for_clocks_ranges()
762 table->WatermarkRow[0][i].MaxClock = in smu_set_watermarks_for_clocks_ranges()
766 table->WatermarkRow[0][i].MinUclk = in smu_set_watermarks_for_clocks_ranges()
770 table->WatermarkRow[0][i].MaxUclk = in smu_set_watermarks_for_clocks_ranges()
774 table->WatermarkRow[0][i].WmSetting = (uint8_t) in smu_set_watermarks_for_clocks_ranges()
Dsmu_helper.h46 struct watermark_row_generic_t WatermarkRow[2][4]; member
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0_5_ppt.c403 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v13_0_5_set_watermarks_table()
405 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table()
407 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v13_0_5_set_watermarks_table()
409 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v13_0_5_set_watermarks_table()
412 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v13_0_5_set_watermarks_table()
417 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v13_0_5_set_watermarks_table()
419 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table()
421 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v13_0_5_set_watermarks_table()
423 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v13_0_5_set_watermarks_table()
426 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v13_0_5_set_watermarks_table()
Dsmu_v13_0_4_ppt.c655 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v13_0_4_set_watermarks_table()
657 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table()
659 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v13_0_4_set_watermarks_table()
661 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v13_0_4_set_watermarks_table()
664 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v13_0_4_set_watermarks_table()
669 table->WatermarkRow[WM_SOCCLK][i].MinClock = in smu_v13_0_4_set_watermarks_table()
671 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table()
673 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in smu_v13_0_4_set_watermarks_table()
675 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in smu_v13_0_4_set_watermarks_table()
678 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in smu_v13_0_4_set_watermarks_table()
Dyellow_carp_ppt.c493 table->WatermarkRow[WM_DCFCLK][i].MinClock = in yellow_carp_set_watermarks_table()
495 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in yellow_carp_set_watermarks_table()
497 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in yellow_carp_set_watermarks_table()
499 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in yellow_carp_set_watermarks_table()
502 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in yellow_carp_set_watermarks_table()
507 table->WatermarkRow[WM_SOCCLK][i].MinClock = in yellow_carp_set_watermarks_table()
509 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in yellow_carp_set_watermarks_table()
511 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in yellow_carp_set_watermarks_table()
513 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in yellow_carp_set_watermarks_table()
516 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in yellow_carp_set_watermarks_table()
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c1047 table->WatermarkRow[WM_DCFCLK][i].MinClock = in renoir_set_watermarks_table()
1049 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in renoir_set_watermarks_table()
1051 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in renoir_set_watermarks_table()
1053 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in renoir_set_watermarks_table()
1056 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in renoir_set_watermarks_table()
1058 table->WatermarkRow[WM_DCFCLK][i].WmType = in renoir_set_watermarks_table()
1063 table->WatermarkRow[WM_SOCCLK][i].MinClock = in renoir_set_watermarks_table()
1065 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in renoir_set_watermarks_table()
1067 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in renoir_set_watermarks_table()
1069 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in renoir_set_watermarks_table()
[all …]
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c388 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entr… in dcn3_notify_wm_ranges()
389 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entr… in dcn3_notify_wm_ranges()
390 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinUclk = clk_mgr->base.bw_params->wm_table.nv_entri… in dcn3_notify_wm_ranges()
391 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxUclk = clk_mgr->base.bw_params->wm_table.nv_entri… in dcn3_notify_wm_ranges()
392 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].WmSetting = i; in dcn3_notify_wm_ranges()
393 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries… in dcn3_notify_wm_ranges()
Ddcn30_smu11_driver_if.h52 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/inc/
Dsmu10_driver_if.h70 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
Dsmu9_driver_if.h347 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
Dsmu13_driver_if_v13_0_5.h73 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
Dsmu13_driver_if_yellow_carp.h72 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
Dsmu12_driver_if.h73 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
Dsmu13_driver_if_v13_0_4.h73 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
Dsmu11_driver_if_vangogh.h72 WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; member
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dvangogh_ppt.c1592 table->WatermarkRow[WM_DCFCLK][i].MinClock = in vangogh_set_watermarks_table()
1594 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in vangogh_set_watermarks_table()
1596 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in vangogh_set_watermarks_table()
1598 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in vangogh_set_watermarks_table()
1601 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in vangogh_set_watermarks_table()
1606 table->WatermarkRow[WM_SOCCLK][i].MinClock = in vangogh_set_watermarks_table()
1608 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in vangogh_set_watermarks_table()
1610 table->WatermarkRow[WM_SOCCLK][i].MinMclk = in vangogh_set_watermarks_table()
1612 table->WatermarkRow[WM_SOCCLK][i].MaxMclk = in vangogh_set_watermarks_table()
1615 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in vangogh_set_watermarks_table()
Dnavi10_ppt.c2126 table->WatermarkRow[WM_DCEFCLK][i].MinClock = in navi10_set_watermarks_table()
2128 table->WatermarkRow[WM_DCEFCLK][i].MaxClock = in navi10_set_watermarks_table()
2130 table->WatermarkRow[WM_DCEFCLK][i].MinUclk = in navi10_set_watermarks_table()
2132 table->WatermarkRow[WM_DCEFCLK][i].MaxUclk = in navi10_set_watermarks_table()
2135 table->WatermarkRow[WM_DCEFCLK][i].WmSetting = in navi10_set_watermarks_table()
2140 table->WatermarkRow[WM_SOCCLK][i].MinClock = in navi10_set_watermarks_table()
2142 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in navi10_set_watermarks_table()
2144 table->WatermarkRow[WM_SOCCLK][i].MinUclk = in navi10_set_watermarks_table()
2146 table->WatermarkRow[WM_SOCCLK][i].MaxUclk = in navi10_set_watermarks_table()
2149 table->WatermarkRow[WM_SOCCLK][i].WmSetting = in navi10_set_watermarks_table()

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