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Searched refs:TRCRSCTLRn (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/drivers/hwtracing/coresight/
Dcoresight-etm4x.h79 #define TRCRSCTLRn(n) (0x200 + (n * 4)) macro
338 CASE_##op((val), TRCRSCTLRn(2)) \
339 CASE_##op((val), TRCRSCTLRn(3)) \
340 CASE_##op((val), TRCRSCTLRn(4)) \
341 CASE_##op((val), TRCRSCTLRn(5)) \
342 CASE_##op((val), TRCRSCTLRn(6)) \
343 CASE_##op((val), TRCRSCTLRn(7)) \
344 CASE_##op((val), TRCRSCTLRn(8)) \
345 CASE_##op((val), TRCRSCTLRn(9)) \
346 CASE_##op((val), TRCRSCTLRn(10)) \
[all …]
Dcoresight-cfg-afdo.c33 .offset = TRCRSCTLRn(2),
39 .offset = TRCRSCTLRn(3),
Dcoresight-etm4x-cfg.c100 } else if ((offset >= TRCRSCTLRn(2)) && in etm4_cfg_map_reg_offset()
101 (offset <= TRCRSCTLRn((ETM_MAX_RES_SEL - 1)))) { in etm4_cfg_map_reg_offset()
Dcoresight-etm4x-core.c441 etm4x_relaxed_write32(csa, config->res_ctrl[i], TRCRSCTLRn(i)); in etm4_enable_hw()
1631 state->trcrsctlr[i] = etm4x_read32(csa, TRCRSCTLRn(i)); in __etm4_cpu_save()
1760 etm4x_relaxed_write32(csa, state->trcrsctlr[i], TRCRSCTLRn(i)); in __etm4_cpu_restore()