Searched refs:SSE (Results 1 – 11 of 11) sorted by relevance
| /linux-5.19.10/arch/x86/kernel/ |
| D | verify_cpu.S | 124 jz .Lverify_cpu_no_longmode # only try to force SSE on AMD
127 btr $15,%eax # enable SSE
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| /linux-5.19.10/Documentation/devicetree/bindings/arm/ |
| D | arm,corstone1000.yaml | 14 ARM's Corstone1000 includes pre-verified Corstone SSE-710 subsystem that
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| /linux-5.19.10/arch/x86/crypto/ |
| D | crct10dif-pcl-asm_64.S | 2 # Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
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| D | chacha-ssse3-x86_64.S | 231 # the state matrix in SSE registers four times. As we need some scratch
236 # which allows us to do XOR in SSE registers. 8/16-bit word rotation is
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| /linux-5.19.10/drivers/scsi/aic7xxx/ |
| D | aic7xxx_pci.c | 591 #define SSE 0x40 macro
1942 if (status1 & SSE) { in ahc_pci_intr()
1963 if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) { in ahc_pci_intr()
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| D | aic79xx.reg | 1144 field SSE 0x40
1162 field SSE 0x40
1179 field SSE 0x40
1195 field SSE 0x40
1212 field SSE 0x40
1227 field SSE 0x40
1244 field SSE 0x40
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| D | aic79xx_pci.c | 730 #define SSE 0x40 macro
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| D | aic79xx_reg.h_shipped | 1309 #define SSE 0x40
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| /linux-5.19.10/tools/arch/x86/kcpuid/ |
| D | cpuid.csv | 75 1, 0, EDX, 25, sse, SSE
246 0xD, 0, EAX, 1, sse, SSE state
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| /linux-5.19.10/arch/x86/ |
| D | Kconfig.cpu | 251 of SSE and tells gcc to treat the CPU as a 686.
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| /linux-5.19.10/ |
| D | CREDITS | 1728 D: Pentium III FXSR, SSE support
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