Searched refs:SOC_LF_TIMER_CONTROL0_ADDRESS (Results 1 – 2 of 2) sorted by relevance
909 #define SOC_LF_TIMER_CONTROL0_ADDRESS 0x00000050 macro
2615 val = ath10k_pci_soc_read32(ar, SOC_LF_TIMER_CONTROL0_ADDRESS); in ath10k_pci_warm_reset_clear_lf()2616 ath10k_pci_soc_write32(ar, SOC_LF_TIMER_CONTROL0_ADDRESS, in ath10k_pci_warm_reset_clear_lf()