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Searched refs:RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c5174 data &= ~RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK; in gfx_v11_0_update_spm_vmid()
5175 data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT; in gfx_v11_0_update_spm_vmid()
Dgfx_v9_0.c5076 data &= ~RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK; in gfx_v9_0_update_spm_vmid()
5077 data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT; in gfx_v9_0_update_spm_vmid()
Dgfx_v10_0.c8268 data &= ~RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK; in gfx_v10_0_update_spm_vmid()
8269 data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT; in gfx_v10_0_update_spm_vmid()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h23365 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
Dgc_9_1_sh_mask.h24656 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
Dgc_9_2_1_sh_mask.h24720 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
Dgc_9_4_2_sh_mask.h22164 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
Dgc_11_0_0_sh_mask.h36851 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
Dgc_10_1_0_sh_mask.h33666 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
Dgc_10_3_0_sh_mask.h32743 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro