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Searched refs:REF_CLK (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/Documentation/devicetree/bindings/clock/
Dcirrus,cs2000-cp.yaml25 Common clock binding for CLK_IN, XTI/REF_CLK
62 output signal directly from the REF_CLK input.
/linux-5.19.10/include/dt-bindings/clock/
Dxlnx-versal-clk.h115 #define REF_CLK 106 macro
/linux-5.19.10/arch/arm64/boot/dts/ti/
Dk3-am65-iot2050-common-pg2.dtsi41 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
Dk3-am65-main.dtsi365 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
405 assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
/linux-5.19.10/drivers/clk/
Dclk-cs2000-cp.c75 #define REF_CLK 1 macro
427 return priv->dynamic_mode ? CLK_IN : REF_CLK; in cs2000_get_parent()
506 parent_names[REF_CLK] = __clk_get_name(priv->ref_clk); in cs2000_clk_register()
/linux-5.19.10/drivers/pinctrl/
Dpinctrl-ocelot.c733 SERVALT_P(12, REF_CLK, SFP, TWI_SCL_M);
734 SERVALT_P(13, REF_CLK, SFP, TWI_SCL_M);
735 SERVALT_P(14, REF_CLK, IRQ0_OUT, SI);
736 SERVALT_P(15, REF_CLK, IRQ1_OUT, SI);