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Searched refs:PFIT_CONTROL (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/gma500/
Doaktrail_lvds.c133 REG_WRITE(PFIT_CONTROL, 0); in oaktrail_lvds_mode_set()
139 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
143 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | in oaktrail_lvds_mode_set()
146 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | in oaktrail_lvds_mode_set()
149 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
151 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); in oaktrail_lvds_mode_set()
Dpsb_intel_lvds.c267 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL); in psb_intel_lvds_save()
308 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL); in psb_intel_lvds_restore()
484 REG_WRITE(PFIT_CONTROL, pfit_control); in psb_intel_lvds_mode_set()
Dpsb_intel_display.c83 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()
213 REG_WRITE(PFIT_CONTROL, 0); in psb_intel_crtc_mode_set()
Doaktrail_device.c236 regs->psb.savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); in oaktrail_save_display_registers()
360 PSB_WVDC32(regs->psb.savePFIT_CONTROL, PFIT_CONTROL); in oaktrail_restore_display_registers()
Dcdv_device.c291 regs->cdv.savePFIT_CONTROL = REG_READ(PFIT_CONTROL); in cdv_save_display_registers()
362 REG_WRITE(PFIT_CONTROL, regs->cdv.savePFIT_CONTROL); in cdv_restore_display_registers()
Doaktrail_crtc.c349 pfit_control = REG_READ(PFIT_CONTROL); in oaktrail_panel_fitter_pipe()
425 REG_WRITE(PFIT_CONTROL, 0); in oaktrail_crtc_mode_set()
Dcdv_intel_display.c562 pfit_control = REG_READ(PFIT_CONTROL); in cdv_intel_panel_fitter_pipe()
761 REG_WRITE(PFIT_CONTROL, 0); in cdv_intel_crtc_mode_set()
Dcdv_intel_lvds.c291 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_lvds_mode_set()
Dpsb_intel_reg.h205 #define PFIT_CONTROL 0x61230 macro
Dcdv_intel_dp.c1098 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_dp_mode_set()
/linux-5.19.10/drivers/gpu/drm/i915/display/
Dintel_lvds.c149 tmp = intel_de_read(dev_priv, PFIT_CONTROL); in intel_lvds_get_config()
Dintel_overlay.c938 u32 pfit_control = intel_de_read(dev_priv, PFIT_CONTROL); in update_pfit_vscale_ratio()
Dintel_display.c2070 intel_de_read(dev_priv, PFIT_CONTROL) & PFIT_ENABLE); in i9xx_pfit_enable()
2075 intel_de_write(dev_priv, PFIT_CONTROL, crtc_state->gmch_pfit.control); in i9xx_pfit_enable()
2365 intel_de_read(dev_priv, PFIT_CONTROL)); in i9xx_pfit_disable()
2366 intel_de_write(dev_priv, PFIT_CONTROL, 0); in i9xx_pfit_disable()
3215 tmp = intel_de_read(dev_priv, PFIT_CONTROL); in i9xx_get_pfit_config()
/linux-5.19.10/drivers/gpu/drm/i915/
Di915_reg.h2880 #define PFIT_CONTROL _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61230) macro