Searched refs:OWL_EMAC_BIT_MAC_CSR5_RI (Results 1 – 2 of 2) sorted by relevance
63 #define OWL_EMAC_BIT_MAC_CSR5_RI BIT(6) /* Receive interrupt */ macro
892 if (status & OWL_EMAC_BIT_MAC_CSR5_RI) { in owl_emac_poll()