Searched refs:NumDispClkLevelsEnabled (Results 1 – 10 of 10) sorted by relevance
519 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn316_clk_mgr_helper_populate_bw_params()520 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn316_clk_mgr_helper_populate_bw_params()521 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn316_clk_mgr_helper_populate_bw_params()522 max_dppclk = find_max_clk_value(clock_table->DppClocks, clock_table->NumDispClkLevelsEnabled); in dcn316_clk_mgr_helper_populate_bw_params()
87 uint8_t NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk member
121 uint8_t NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk member
132 uint8_t NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk member
133 uint8_t NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk member
145 uint8_t NumDispClkLevelsEnabled; //applies to both dispclk and dppclk member
79 uint8_t NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk member
577 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn31_clk_mgr_helper_populate_bw_params()578 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn31_clk_mgr_helper_populate_bw_params()579 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn31_clk_mgr_helper_populate_bw_params()580 max_dppclk = find_max_clk_value(clock_table->DppClocks, clock_table->NumDispClkLevelsEnabled); in dcn31_clk_mgr_helper_populate_bw_params()
141 uint8_t NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk member
116 uint8_t NumDispClkLevelsEnabled; //applies to both dispclk and dppclk member