Searched refs:IMX6UL_CLK_PLL2_PFD2 (Results 1 – 8 of 8) sorted by relevance
21 assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
179 assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
178 assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
297 assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
81 <&clks IMX6UL_CLK_PLL2_PFD2>,
47 #define IMX6UL_CLK_PLL2_PFD2 38 macro
201 hws[IMX6UL_CLK_PLL2_PFD2] = imx_clk_hw_pfd("pll2_pfd2_396m", "pll2_bus", base + 0x100, 2); in imx6ul_clocks_init()517 clk_set_parent(hws[IMX6UL_CLK_ENFC_SEL]->clk, hws[IMX6UL_CLK_PLL2_PFD2]->clk); in imx6ul_clocks_init()