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Searched refs:CLK_PPMULCD0 (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dexynos4.h223 #define CLK_PPMULCD0 408 macro
Dexynos3250.h191 #define CLK_PPMULCD0 185 macro
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos3250.c620 GATE(CLK_PPMULCD0, "ppmulcd0", "div_aclk_160", GATE_IP_LCD, 5,
Dclk-exynos4.c834 GATE(CLK_PPMULCD0, "ppmulcd0", "aclk160", GATE_IP_LCD0, 5, 0, 0),
/linux-5.19.10/arch/arm/boot/dts/
Dexynos3250.dtsi746 clocks = <&cmu CLK_PPMULCD0>;
Dexynos4.dtsi830 clocks = <&clock CLK_PPMULCD0>;