Searched refs:CLK_GSCL0 (Results 1 – 7 of 7) sorted by relevance
| /linux-5.19.10/include/dt-bindings/clock/ |
| D | exynos5250.h | 60 #define CLK_GSCL0 256 macro
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| D | exynos5420.h | 164 #define CLK_GSCL0 465 macro
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| /linux-5.19.10/Documentation/devicetree/bindings/iommu/ |
| D | samsung,sysmmu.yaml | 96 <&clock CLK_GSCL0>;
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| /linux-5.19.10/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 515 GATE(CLK_GSCL0, "gscl0", "mout_aclk266_gscl_sub", GATE_IP_GSCL, 0, 0,
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| D | clk-exynos5420.c | 1249 GATE(CLK_GSCL0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0),
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| /linux-5.19.10/arch/arm/boot/dts/ |
| D | exynos5250.dtsi | 737 clocks = <&clock CLK_GSCL0>;
1032 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
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| D | exynos5420.dtsi | 710 clocks = <&clock CLK_GSCL0>;
917 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
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