Searched refs:A_IMR_CPU0_BASE (Results 1 – 2 of 2) sorted by relevance
21 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU),26 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),31 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU),
698 #define A_IMR_CPU0_BASE 0x0010020000 macro703 #define A_IMR_MAPPER(cpu) (A_IMR_CPU0_BASE+(cpu)*IMR_REGISTER_SPACING)730 (A_IMR_CPU0_BASE + (cpu * IMR_REGISTER_SPACING) + reg)