Searched refs:APLL (Results 1 – 6 of 6) sorted by relevance
1 Binding for Texas Instruments APLL clock.6 register-mapped APLL with usually two selectable input clocks10 modes (locked, low power stop etc.) APLL mostly behaves like20 - reg : address and length of the register set for controlling the APLL.
27 #define APLL 18 macro
14 #define APLL 2 macro
295 .pll = DEF_PLL(APLL),
35 - 0 0 APLL
237 * Fix the emac parent clock is DPLL instead of APLL.