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Searched refs:base_clock (Results 1 – 5 of 5) sorted by relevance

/linux-3.4.99/arch/mips/ar7/
Dclock.c176 int base_clock = AR7_REF_CLOCK; in tnetd7300_get_clock() local
186 base_clock = bus_clock; in tnetd7300_get_clock()
189 base_clock = AR7_REF_CLOCK; in tnetd7300_get_clock()
192 base_clock = AR7_XTAL_CLOCK; in tnetd7300_get_clock()
195 base_clock = cpu_clk.rate; in tnetd7300_get_clock()
200 return base_clock / divisor; in tnetd7300_get_clock()
203 return (base_clock >> (mul / 16 + 1)) / divisor; in tnetd7300_get_clock()
207 (base_clock * mul) >> 1 : in tnetd7300_get_clock()
208 (base_clock * (mul - 1)) >> 2; in tnetd7300_get_clock()
213 return base_clock / divisor; in tnetd7300_get_clock()
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/linux-3.4.99/drivers/staging/comedi/drivers/
Dni_atmio16d.c409 unsigned int timer, base_clock; in atmio16d_ai_cmd() local
447 base_clock = CLOCK_1_MHZ; in atmio16d_ai_cmd()
450 base_clock = CLOCK_100_KHZ; in atmio16d_ai_cmd()
453 base_clock = CLOCK_10_KHZ; in atmio16d_ai_cmd()
456 base_clock = CLOCK_1_KHZ; in atmio16d_ai_cmd()
460 outw(base_clock, dev->iobase + AM9513A_DATA_REG); in atmio16d_ai_cmd()
515 base_clock = CLOCK_1_MHZ; in atmio16d_ai_cmd()
518 base_clock = CLOCK_100_KHZ; in atmio16d_ai_cmd()
521 base_clock = CLOCK_10_KHZ; in atmio16d_ai_cmd()
524 base_clock = CLOCK_1_KHZ; in atmio16d_ai_cmd()
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/linux-3.4.99/drivers/mmc/host/
Dmvsdio.c48 unsigned int base_clock; member
624 u32 m = DIV_ROUND_UP(host->base_clock, ios->clock) - 1; in mvsd_set_ios()
629 host->ns_per_clk = 1000000000 / (host->base_clock / (m+1)); in mvsd_set_ios()
631 ios->clock, host->base_clock / (m+1), m); in mvsd_set_ios()
733 host->base_clock = mvsd_data->clock / 2; in mvsd_probe()
741 mmc->f_min = DIV_ROUND_UP(host->base_clock, MVSD_BASE_DIV_MAX); in mvsd_probe()
/linux-3.4.99/drivers/hwmon/
Dw83795.c295 unsigned long base_clock; in pwm_freq_from_reg() local
298 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); in pwm_freq_from_reg()
299 return base_clock / ((reg & 0x7f) + 1); in pwm_freq_from_reg()
306 unsigned long base_clock; in pwm_freq_to_reg() local
321 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); in pwm_freq_to_reg()
322 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); in pwm_freq_to_reg()
323 best1 = base_clock / reg1; in pwm_freq_to_reg()
/linux-3.4.99/drivers/tty/
Dsynclink_gt.c302 unsigned int base_clock; member
1178 info->base_clock = tmp_params.clock_speed; in set_params32()
2657 info->base_clock = tmp_params.clock_speed; in set_params()
3604 info->base_clock = 14745600; in alloc_dev()
3953 unsigned int osc = info->base_clock; in set_rate()
4246 ((info->base_clock < (info->params.data_rate * 16)) || in async_mode()
4247 (info->base_clock % (info->params.data_rate * 16)))) { in async_mode()