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Searched refs:PNX4008_PWRMAN_BASE (Results 1 – 6 of 6) sorted by relevance

/linux-3.4.99/arch/arm/mach-pnx4008/include/mach/
Dirq.h35 #define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1)))
36 #define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1)))
37 #define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1)))
38 #define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1)))
Dgpio-pnx4008.h198 #define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1)))
199 #define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1)))
200 #define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1)))
201 #define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1)))
Dplatform.h36 #define PNX4008_PWRMAN_BASE 0x40004000 macro
Dclock.h19 #define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE)
/linux-3.4.99/arch/arm/mach-pnx4008/
Dtime.c111 #define TIMCLK_CTRL_REG IO_ADDRESS((PNX4008_PWRMAN_BASE + 0xBC))
Dsleep.S18 #define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE)