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Searched refs:NVReadVgaCrtc (Results 1 – 8 of 8) sorted by relevance

/linux-3.4.99/drivers/gpu/drm/nouveau/
Dnv04_display.c44 dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44); in nv04_display_store_initial_head_owner()
56 slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) & in nv04_display_store_initial_head_owner()
59 tvB = !(NVReadVgaCrtc(dev, 1, NV_CIO_CRE_LCD__INDEX) & in nv04_display_store_initial_head_owner()
62 slaved_on_A = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX) & in nv04_display_store_initial_head_owner()
65 tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) & in nv04_display_store_initial_head_owner()
Dnouveau_hw.h192 static inline uint8_t NVReadVgaCrtc(struct drm_device *dev, in NVReadVgaCrtc() function
227 return NVReadVgaCrtc(dev, head, NV_CIO_CRE_58); in NVReadVgaCrtc5758()
333 return NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44) & 0x4; in nv_heads_tied()
340 uint8_t cr11 = NVReadVgaCrtc(dev, head, NV_CIO_CR_VRE_INDEX); in nv_lock_vga_crtc_base()
369 cr21 = NVReadVgaCrtc(dev, head, NV_CIO_CRE_21) | 0xfa; in nv_lock_vga_crtc_shadow()
381 bool waslocked = !NVReadVgaCrtc(dev, 0, NV_CIO_SR_LOCK_INDEX); in NVLockVgaCrtcs()
430 int cre_heb = NVReadVgaCrtc(dev, head, NV_CIO_CRE_HEB__INDEX); in nv_set_crtc_base()
Dnouveau_i2c.c37 u8 val = NVReadVgaCrtc(port->dev, 0, port->drive); in i2c_drive_scl()
57 u8 val = NVReadVgaCrtc(port->dev, 0, port->drive); in i2c_drive_sda()
78 return !!(NVReadVgaCrtc(port->dev, 0, port->sense) & 0x04); in i2c_sense_scl()
98 return !!(NVReadVgaCrtc(port->dev, 0, port->sense) & 0x08); in i2c_sense_sda()
Dnv04_dac.c139 saved_cr_mode = NVReadVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX); in nv04_dac_detect()
151 saved_pi = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX); in nv04_dac_detect()
154 saved_rpc1 = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX); in nv04_dac_detect()
267 if (!(NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX) & 0xC0)) in nv17_dac_sample_load()
Dnv04_tv.c79 crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX); in nv04_tv_dpms()
Dnv04_crtc.c176 crtc1A = NVReadVgaCrtc(dev, nv_crtc->index, in nv_crtc_dpms()
209 crtc17 |= (NVReadVgaCrtc(dev, nv_crtc->index, NV_CIO_CR_MODE_INDEX) & ~0x80); in nv_crtc_dpms()
704 uint8_t tmp = NVReadVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RCR); in nv_crtc_commit()
Dnouveau_hw.c94 NVReadVgaCrtc(dev, 0, NV_CIO_SR_LOCK_INDEX); in NVSetOwner()
95 NVReadVgaCrtc(dev, 1, NV_CIO_SR_LOCK_INDEX); in NVSetOwner()
638 crtcstate->CRTC[index] = NVReadVgaCrtc(dev, head, index); in rd_cio_state()
Dnouveau_bios.c489 data = NVReadVgaCrtc(dev, bios->state.crtchead, index); in bios_idxprt_rd()
6463 if (NVReadVgaCrtc(dev, 0, 0x00) == 0 && in nouveau_bios_posted()
6464 NVReadVgaCrtc(dev, 0, 0x1a) == 0) in nouveau_bios_posted()
6469 htotal = NVReadVgaCrtc(dev, 0, 0x06); in nouveau_bios_posted()
6470 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; in nouveau_bios_posted()
6471 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; in nouveau_bios_posted()
6472 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; in nouveau_bios_posted()
6473 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; in nouveau_bios_posted()
6525 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; in nouveau_bios_init()