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Searched refs:EXYNOS4_CLKDIV_FSYS1 (Results 1 – 2 of 2) sorted by relevance

/linux-3.4.99/arch/arm/mach-exynos/
Dclock-exynos4.c56 SAVE_ITEM(EXYNOS4_CLKDIV_FSYS1),
991 .reg_div = { .reg = EXYNOS4_CLKDIV_FSYS1, .shift = 0, .size = 4 },
1000 .reg_div = { .reg = EXYNOS4_CLKDIV_FSYS1, .shift = 16, .size = 4 },
1210 .reg_div = { .reg = EXYNOS4_CLKDIV_FSYS1, .shift = 8, .size = 8 },
1221 .reg_div = { .reg = EXYNOS4_CLKDIV_FSYS1, .shift = 24, .size = 8 },
/linux-3.4.99/arch/arm/mach-exynos/include/mach/
Dregs-clock.h68 #define EXYNOS4_CLKDIV_FSYS1 EXYNOS_CLKREG(0x0C544) macro