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Searched refs:stmp3xxx_setl (Results 1 – 9 of 9) sorted by relevance

/linux-2.6.39/arch/arm/mach-stmp37xx/
Dstmp37xx.c69 stmp3xxx_setl(0x04 << ((d->irq % 4) * 8), in stmp37xx_unmask_irq()
91 stmp3xxx_setl(1 << (8 + STMP3XXX_DMA_CHANNEL(channel)), in stmp3xxx_arch_dma_enable_interrupt()
96 stmp3xxx_setl(1 << (8 + STMP3XXX_DMA_CHANNEL(channel)), in stmp3xxx_arch_dma_enable_interrupt()
145 stmp3xxx_setl(chbit << BP_APBH_CTRL0_RESET_CHANNEL, in stmp3xxx_arch_dma_reset_channel()
153 stmp3xxx_setl(chbit << BP_APBX_CTRL0_RESET_CHANNEL, in stmp3xxx_arch_dma_reset_channel()
169 stmp3xxx_setl(1 << chbit, REGS_APBH_BASE + HW_APBH_CTRL0); in stmp3xxx_arch_dma_freeze()
172 stmp3xxx_setl(1 << chbit, REGS_APBH_BASE + HW_APBH_CTRL0); in stmp3xxx_arch_dma_freeze()
/linux-2.6.39/arch/arm/mach-stmp378x/
Dstmp378x.c73 stmp3xxx_setl(BM_ICOLL_INTERRUPTn_ENABLE, in stmp378x_unmask_irq()
109 stmp3xxx_setl(1 << (16 + STMP3XXX_DMA_CHANNEL(channel)), c1); in stmp3xxx_arch_dma_enable_interrupt()
110 stmp3xxx_setl(1 << (16 + STMP3XXX_DMA_CHANNEL(channel)), c2); in stmp3xxx_arch_dma_enable_interrupt()
176 stmp3xxx_setl(mask, c0); in stmp3xxx_arch_dma_reset_channel()
189 stmp3xxx_setl(mask, REGS_APBH_BASE + HW_APBH_CTRL0); in stmp3xxx_arch_dma_freeze()
192 stmp3xxx_setl(mask, REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL); in stmp3xxx_arch_dma_freeze()
/linux-2.6.39/arch/arm/plat-stmp3xxx/
Dpinmux.c198 stmp3xxx_setl(val << shift, hwdrive); in stmp3xxx_pin_strength()
224 stmp3xxx_setl(HW_DRIVE_PINV_MASK << shift, hwdrive); in stmp3xxx_pin_voltage()
245 stmp3xxx_setl(1 << pin, hwpull); in stmp3xxx_pin_pullup()
292 stmp3xxx_setl(val << shift, hwmux); in stmp3xxx_set_pin_type()
391 stmp3xxx_setl(1 << gpio, pm->irqlevel); in stmp3xxx_set_irqtype()
395 stmp3xxx_setl(1 << gpio, pm->irqpolarity); in stmp3xxx_set_irqtype()
428 stmp3xxx_setl(1 << gpio, pm->irqen); in stmp3xxx_pin_unmask_irq()
429 stmp3xxx_setl(1 << gpio, pm->pin2irq); in stmp3xxx_pin_unmask_irq()
458 stmp3xxx_setl(1 << offset, pm->hw_gpio_out); in stmp3xxx_gpio_set()
467 stmp3xxx_setl(1 << offset, pm->hw_gpio_doe); in stmp3xxx_gpio_output()
Ddma.c354 stmp3xxx_setl(mask, c); in stmp37xx_circ_advance_active()
403 stmp3xxx_setl(mask << shift, c); in stmp3xxx_dma_set_alt_target()
409 stmp3xxx_setl(BM_APBH_CTRL0_CLKGATE, REGS_APBH_BASE + HW_APBH_CTRL0); in stmp3xxx_dma_suspend()
410 stmp3xxx_setl(BM_APBX_CTRL0_CLKGATE, REGS_APBX_BASE + HW_APBX_CTRL0); in stmp3xxx_dma_suspend()
Dtimer.c150 stmp3xxx_setl(BM_TIMROT_ROTCTRL_CLKGATE, in stmp3xxx_suspend_timer()
/linux-2.6.39/drivers/spi/
Dspi_stmp.c255 stmp3xxx_setl(BM_SSP_CTRL0_LOCK_CS, ss->regs + HW_SSP_CTRL0); in stmp_spi_enable()
262 stmp3xxx_setl(BM_SSP_CTRL0_IGNORE_CRC, ss->regs + HW_SSP_CTRL0); in stmp_spi_disable()
272 stmp3xxx_setl(stmp_spi_cs(cs), ss->regs + HW_SSP_CTRL0); in stmp_spi_txrx_pio()
280 stmp3xxx_setl(1, ss->regs + HW_SSP_CTRL0); in stmp_spi_txrx_pio()
286 stmp3xxx_setl(BM_SSP_CTRL0_READ, in stmp_spi_txrx_pio()
290 stmp3xxx_setl(BM_SSP_CTRL0_RUN, ss->regs + HW_SSP_CTRL0); in stmp_spi_txrx_pio()
300 stmp3xxx_setl(BM_SSP_CTRL0_DATA_XFER, ss->regs + HW_SSP_CTRL0); in stmp_spi_txrx_pio()
/linux-2.6.39/arch/arm/plat-stmp3xxx/include/mach/
Dplatform.h60 static inline void stmp3xxx_setl(u32 v, void __iomem *r) in stmp3xxx_setl() function
/linux-2.6.39/drivers/watchdog/
Dstmp3xxx_wdt.c42 stmp3xxx_setl(BM_RTC_CTRL_WATCHDOGEN, REGS_RTC_BASE + HW_RTC_CTRL); in wdt_enable()
43 stmp3xxx_setl(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER, in wdt_enable()
/linux-2.6.39/drivers/rtc/
Drtc-stmp3xxx.c107 stmp3xxx_setl(BM_RTC_PERSISTENT0_ALARM_EN | in stmp3xxx_alarm_irq_enable()
109 stmp3xxx_setl(BM_RTC_CTRL_ALARM_IRQ_EN, ctl); in stmp3xxx_alarm_irq_enable()