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Searched refs:reg_mode_ctrl (Results 1 – 1 of 1) sorted by relevance

/linux-2.6.39/drivers/staging/winbond/
Dphy_calibration.c437 u32 reg_mode_ctrl; in _txidac_dc_offset_cancellation_winbond() local
476 hw_get_dxx_reg(phw_data, REG_MODE_CTRL, &reg_mode_ctrl); in _txidac_dc_offset_cancellation_winbond()
478 PHY_DEBUG(("[CAL] MODE_CTRL (read) = 0x%08X\n", reg_mode_ctrl)); in _txidac_dc_offset_cancellation_winbond()
479 reg_mode_ctrl &= ~(MASK_IQCAL_TONE_SEL|MASK_IQCAL_MODE); in _txidac_dc_offset_cancellation_winbond()
488 reg_mode_ctrl |= (MASK_CALIB_START|2|(2<<2)); in _txidac_dc_offset_cancellation_winbond()
489 hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); in _txidac_dc_offset_cancellation_winbond()
490 PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); in _txidac_dc_offset_cancellation_winbond()
553 reg_mode_ctrl &= ~MASK_CALIB_START; in _txidac_dc_offset_cancellation_winbond()
554 hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); in _txidac_dc_offset_cancellation_winbond()
555 PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); in _txidac_dc_offset_cancellation_winbond()
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