Searched refs:post_divider (Results 1 – 7 of 7) sorted by relevance
345 u32 post_divider; in aty_var_to_pll_18818() local351 post_divider = 1; in aty_var_to_pll_18818()362 post_divider *= 2; in aty_var_to_pll_18818()373 switch (post_divider) { in aty_var_to_pll_18818()393 pll->ics2595.post_divider = post_divider; in aty_var_to_pll_18818()559 pll->ics2595.post_divider = divider; /* fuer nix */ in aty_var_to_pll_1703()678 pll->ics2595.post_divider = 0; in aty_var_to_pll_8398()796 pll->ics2595.post_divider = divider; /* fuer nix */ in aty_var_to_pll_408()
199 rinfo->panel_info.post_divider = BIOS_IN8(tmp + 48); in radeon_get_panel_info_BIOS()206 pr_debug("post_divider = %x\n", rinfo->panel_info.post_divider); in radeon_get_panel_info_BIOS()670 rinfo->panel_info.post_divider = (ppll_divn >> 16) & 0x7; in radeon_fixup_panel_info()676 (rinfo->panel_info.post_divider << 16), in radeon_fixup_panel_info()
78 u32 post_divider; member
388 u32 post_divider; member1307 div3 |= post_conv[pll->post_divider] << 16; in aty128_set_pll()1345 pll->post_divider = post_dividers[i]; in aty128_var_to_pll()1361 "vclk_per: %d\n", pll->post_divider, in aty128_var_to_pll()
264 int post_divider; member
1596 (rinfo->panel_info.post_divider << 16); in radeonfb_set_par()
706 uint32_t post_divider = 0; in radeon_set_pll() local784 &reference_div, &post_divider); in radeon_set_pll()787 if (post_div->divider == post_divider) in radeon_set_pll()798 post_divider); in radeon_set_pll()