Home
last modified time | relevance | path

Searched refs:base_val (Results 1 – 2 of 2) sorted by relevance

/linux-2.6.39/arch/mips/mm/
Dpage.c631 const u64 base_val = CPHYSADDR((unsigned long)&page_descr[i]) | in sb1_dma_init() local
635 __raw_writeq(base_val, base_reg); in sb1_dma_init()
636 __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg); in sb1_dma_init()
637 __raw_writeq(base_val | M_DM_DSCR_BASE_ENABL, base_reg); in sb1_dma_init()
/linux-2.6.39/drivers/net/
Dtg3.c2755 u32 base_val; in tg3_power_down_prepare() local
2757 base_val = tp->pci_clock_ctrl; in tg3_power_down_prepare()
2758 base_val |= (CLOCK_CTRL_RXCLK_DISABLE | in tg3_power_down_prepare()
2761 tw32_wait_f(TG3PCI_CLOCK_CTRL, base_val | CLOCK_CTRL_ALTCLK | in tg3_power_down_prepare()