Searched refs:X16CLK (Results 1 – 10 of 10) sorted by relevance
82 #define X16CLK 0x40 /* x16 clock mode */ macro
135 #define X16CLK 0x40 /* x16 clock mode */ macro
116 #define X16CLK 0x40 /* x16 clock mode */ macro
108 #define X16CLK 0x40 /* x16 clock mode */ macro
217 #define X16CLK 0x40 /* x16 clock mode */ macro
859 write_zsreg(uap, 4, X16CLK | SB_MASK); in pmz_fix_zero_bug_scc()903 uap->curregs[R4] = X16CLK | SB1; in __pmz_startup()1083 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()1093 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
876 up->curregs[R4] |= X16CLK; in sunzilog_convert_to_zs()1351 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in sunzilog_init_hw()1367 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in sunzilog_init_hw()
811 up->curregs[R4] |= X16CLK; in ip22zilog_convert_to_zs()1139 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in ip22zilog_prepare()
115 X16CLK | SB1, /* write 4 */904 zport->regs[4] |= X16CLK; in zs_set_termios()
103 #define X16CLK 0x40 /* x16 clock mode */ macro