Searched refs:TTM_PL_MASK_CACHING (Results 1 – 6 of 6) sorted by relevance
76 #define TTM_PL_MASK_CACHING (TTM_PL_FLAG_CACHED | \ macro80 #define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING)
151 man->available_caching = TTM_PL_MASK_CACHING; in radeon_init_mem_type()157 man->available_caching = TTM_PL_MASK_CACHING; in radeon_init_mem_type()195 static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in radeon_evict_flags()309 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in radeon_move_vram_ram()356 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in radeon_move_ram_vram()
81 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in radeon_ttm_placement_from_domain()83 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in radeon_ttm_placement_from_domain()85 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in radeon_ttm_placement_from_domain()
192 uint32_t flags = TTM_PL_MASK_CACHING | in nouveau_bo_placement_set()408 man->available_caching = TTM_PL_MASK_CACHING; in nouveau_bo_init_mem_type()441 man->available_caching = TTM_PL_MASK_CACHING; in nouveau_bo_init_mem_type()766 u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; in nouveau_bo_move_flipd()816 u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; in nouveau_bo_move_flips()
244 if ((flags & TTM_PL_MASK_CACHING) == 0) in ttm_buffer_object_create()302 if ((flags & TTM_PL_MASK_CACHING) == 0) in ttm_pl_create_ioctl()
381 ((mem->placement & bo->mem.placement & TTM_PL_MASK_CACHING) == 0)) { in ttm_bo_handle_move_mem()883 uint32_t caching = proposed_placement & TTM_PL_MASK_CACHING; in ttm_bo_select_caching()884 uint32_t result = proposed_placement & ~TTM_PL_MASK_CACHING; in ttm_bo_select_caching()1105 TTM_PL_MASK_CACHING) && in ttm_bo_mem_compat()