Searched refs:PMU1_PLL0_PLLCTL2 (Results 1 – 2 of 2) sorted by relevance
1374 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu1_pllinit0()1471 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu1_cpuclk0()2276 PMU1_PLL0_PLLCTL2 + phypll_offset); in si_pmu_spuravoid_pllupdate()2291 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu_spuravoid_pllupdate()2296 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu_spuravoid_pllupdate()2301 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu_spuravoid_pllupdate()2316 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu_spuravoid_pllupdate()2329 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu_spuravoid_pllupdate()2345 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu_spuravoid_pllupdate()2365 W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); in si_pmu_spuravoid_pllupdate()[all …]
929 #define PMU1_PLL0_PLLCTL2 2 macro